CMPUT 229 (Winter 2018) – Assignment #6 Instructor: Karim Ali
Question 1: (10 points)
A processor with 32-bit addresses uses a 32 KB 2-way set associative cache with 16-byte blocks.
- (5 points) In the table below indicate how many bits are used for offset, index, and tag.
Field Number of bits
Offset Index Tag
- (5 points) Below is a sequence of accesses by the processor to the cache specified above. Assume that all entries in the cache are invalid when the first access occurs. For each access indicate whether it is a hit or a miss.
Address
0x1000 8E38 0x1000 8E3C 0x3CB4 CE30 0x1000 8E30 0x2844 4E34 0x3CB4 CE30 0x1000 8E3C
Outcome (hit or miss)
1/1