Which airplane has the best performance?
Boeing 777
Boeing 747
BAC/Sud Concorde
Douglas DC- 8-50
0 2000 4000 6000 8000 10000
Cruising Range (miles)
Boeing 777
Boeing 747
BAC/Sud Concorde
Douglas DC-8-50
0 100
200 300
400 500
Passenger Capacity
Boeing 777
Boeing 747
BAC/Sud Concorde
Douglas DC- 8-50
0 100000 200000 300000 400000
Passengers x mph
Boeing 777
Boeing 747
BAC/Sud Concorde
Douglas DC-8-50
0 500
1000 1500
Cruising Speed (mph)
Defining Performance Performance 1
CS@VT Computer Organization II ©2005-2015 Ribbens & McQuain
Response Time (latency): how long it takes to complete a task Throughput: total # of tasks completed per unit time
For now, we will focus on response time… and define
Performance 1 Execution Time
Computer Performance: TIME, TIME, TIME Performance 2
CS@VT Computer Organization II ©2005-2015 Ribbens & McQuain
Elapsed Time
– counts everything (disk and memory accesses, I/O , etc.)
– a useful number, but often not good for comparison purposes
CPU time
– doesn’t count I/O or time spent running other programs
– can be broken up into system time, and user time
Our focus: user CPU time
– time spent executing the lines of code that are “in” our program
Execution Time Performance 3
CS@VT Computer Organization II ©2005-2015 Ribbens & McQuain
Performance 1 Execution Time
Relative Performance PerformanceX PerformanceY
Execution TimeY Execution TimeX
Example: time taken to run a program
– 10s on A, 15s on B
– Execution TimeB / Execution TimeA = 15s / 10s = 1.5
(aka speedup)
– So A is 1.5 times as fast as B (and B is 2/3 as fast as A)
Relative Performance Performance 4
CS@VT Computer Organization II ©2005-2015 Ribbens & McQuain
Operation of digital hardware elements is governed by a constant-rate clock.
Clock period
Clock (cycles)
Data transfer and computation
Update state
Clock period: duration of a clock cycle – e.g., 250ps = 0.25ns = 250×10–12s
Clock frequency (rate): cycles per second – e.g., 4.0GHz = 4000MHz = 4.0×109Hz
Clock Cycle Time 1 Clock Rate
CPU Clocking Performance 5
CS@VT Computer Organization II ©2005-2015 Ribbens & McQuain
CPUTime CPUClockCyclesClockCycleTime CPU Clock Cycles
Clock Rate
Performance improved by
– Reducing number of clock cycles
– Increasing clock rate
– Hardware designer must often trade off clock rate against cycle count
CPU Time Performance 6
CS@VT Computer Organization II ©2005-2015 Ribbens & McQuain
Computer A: 2GHz clock, 10s CPU time (to execute a particular program)
Designing Computer B
– Aim for 6s CPU time (to execute the same program)
– Can increase clock rate, but that requires a 20% increase in clock cycles
How fast must Computer B clock be?
Clock RateB Clock CyclesB 1.2Clock CyclesA CPU TimeB 6s
Clock CyclesA CPU TimeA Clock RateA 10s2GHz 20109
Clock RateB 1.220109 24109 4GHz 6s 6s
CPU Time Example Performance 7
CS@VT Computer Organization II ©2005-2015 Ribbens & McQuain
Could assume that number of cycles equals number of instructions:
time
This assumption is incorrect,
– different instructions may take different numbers of cycles on same machine
– same instruction may take different number of cycles on different machines
Why? hint: remember that these are machine instructions, not lines of C code
How many cycles are required for a program? Performance 8
CS@VT Computer Organization II ©2005-2015 Ribbens & McQuain
1st instruction 2nd instruction 3rd instruction 4th
5th 6th …
A given program will require
– some number of instructions (machine instructions)
– some number of cycles
– some number of seconds
We have a vocabulary that relates these quantities:
– cycle time (seconds per cycle)
– clock rate (cycles per second)
– CPI (cycles per instruction)
a floating point intensive application might have a higher CPI
– MIPS (millions of instructions per second)
this would be higher for a program using simple instructions
Now that we understand cycles… Performance 9
CS@VT Computer Organization II ©2005-2015 Ribbens & McQuain
Performance is determined by execution time
Do any of the other variables equal performance? # of cycles to execute program?
# of instructions in program?
# of cycles per second?
average # of cycles per instruction? average # of instructions per second?
Common pitfall: thinking one of these variables (alone) is indicative of performance, when none really is
Performance Performance 10
CS@VT Computer Organization II ©2005-2015 Ribbens & McQuain
Computer A: Cycle Time = 250ps, CPI = 2.0 Computer B: Cycle Time = 500ps, CPI = 1.2 Same ISA
Which is faster, and by how much?
CPU TimeA Instruction CountCPIA Cycle TimeA I2.0250ps I500ps
CPUTimeB InstructionCountCPIBCycleTimeB I1.2500ps I600ps
A is faster…
CPU TimeB I 600ps 1.2 …by this much CPU TimeA I500ps
CPI Example Performance 11
CS@VT Computer Organization II ©2005-2015 Ribbens & McQuain
If different instruction classes take different numbers of cycles
n
i1
Clock Cycles (CPI Instruction Count )
ii
Weighted average CPI
ClockCycles n InstructionCount CPI CPI i
Instruction Count i1 i Instruction Count
Relative frequency
CPI in More Detail Performance 12
CS@VT Computer Organization II ©2005-2015 Ribbens & McQuain
Alternative compiled code sequences using instructions in classes A, B, C
Class
A
B
C
CPI for class
1
2
3
IC in sequence 1
2
1
2
IC in sequence 2
4
1
1
Sequence 1: A B C A C
– IC = 5
– Clock Cycles
= 2×1 + 1×2 + 2×3 = 10
– Avg. CPI = 10/5 = 2.0
Sequence 2: A B A A C A – IC = 6
– Clock Cycles
= 4×1 + 1×2 + 1×3 = 9
– Avg. CPI = 9/6 = 1.5
CPI Example Performance 13
CS@VT Computer Organization II ©2005-2015 Ribbens & McQuain
A compiler designer is trying to decide between two code sequences for a particular machine. Based on the hardware implementation, there are three different classes of instructions: Class A, Class B, and Class C, and they require one, two, and three cycles (respectively).
The first code sequence has 5 instructions: 2 of A, 1 of B, and 2 of C The second sequence has 6 instructions: 4 of A, 1 of B, and 1 of C.
Which sequence will be faster? How much? What is the CPI for each sequence?
# of Instructions Example Performance 14
CS@VT Computer Organization II ©2005-2015 Ribbens & McQuain
Two different compilers are being tested for a 4 GHz. machine with three different classes of instructions: Class A, Class B, and Class C, which require one, two, and three cycles (respectively). Both compilers are used to produce code for a large piece of software.
The first compiler’s code uses 5 million Class A instructions, 1 million Class B instructions, and 2 million Class C instructions.
The second compiler’s code uses 10 million Class A instructions, 1 million Class B instructions, and 1 million Class C instructions.
Which sequence will be faster according to MIPS?
Which sequence will be faster according to execution time?
MIPS example Performance 15
CS@VT Computer Organization II ©2005-2015 Ribbens & McQuain
Execution Time After Improvement =
Execution Time Unaffected + ( Execution Time Affected / Amount of Improvement )
Example:
Suppose a program runs in 100 seconds on a machine, with multiply instructions responsible for 80 seconds of this time.
How much do we have to improve the speed of multiplication if we want the program to run 4 times faster?
How about making it 5 times faster?
Principle: Make the common case fast
Amdahl’s Law Performance 16
CS@VT Computer Organization II ©2005-2015 Ribbens & McQuain
Suppose we enhance a machine making all floating-point instructions run five times faster.
If the execution time of some benchmark program before the floating-point enhancement is 10 seconds, what will the speedup be if half of the 10 seconds is spent executing floating-point instructions?
Example 1 Performance 17
CS@VT Computer Organization II ©2005-2015 Ribbens & McQuain
We are looking for a benchmark to show off the new floating-point unit described above, and want the overall benchmark to show a speedup of 3 (i.e., take 1/3 as long to run).
One benchmark we are considering runs for 90 seconds with the old floating-point hardware.
How much of the execution time would floating-point instructions have to account for in this program in order to yield our desired speedup on this benchmark?
Example 2 Performance 18
CS@VT Computer Organization II ©2005-2015 Ribbens & McQuain
Performance is specific to a particular program/s
– Total execution time is a consistent summary of performance
For a given architecture performance increases come from:
– increases in clock rate (if that yields no adverse CPI affects)
– improvements in processor organization that lower CPI
– compiler enhancements that lower CPI (different distribution of instructions) and/or instruction count
– algorithm/language choices that affect instruction count and/or instruction distribution
Pitfall: expecting improvement in one aspect of a machine’s performance to affect the total performance
Remember Performance 19
CS@VT Computer Organization II ©2005-2015 Ribbens & McQuain
CPU Time Instructions Clock cycles Program Instruction
Seconds Clock cycle
Performance depends on
– Algorithm: affects IC, possibly CPI
– Programming language: affects IC, CPI
– Compiler: affects IC, CPI
– Instruction set architecture: affects IC, CPI, Tc
Performance Summary Performance 20
CS@VT Computer Organization II ©2005-2015 Ribbens & McQuain
benchmark
A program or collection of programs selected for use in comparing computer performance
Kinds of benchmarks:
Kernels (e.g. matrix multiply)
Toy programs (e.g. sorting)
Synthetic benchmarks (e.g. Dhrystone) Benchmark suites (e.g. SPEC06fp, TPC-C)
A benchmark can be used to isolate different aspects of hardware performance.
Benchmarks Performance 21
CS@VT Computer Organization II ©2005-2015 Ribbens & McQuain
FIGURE 1.18 SPECINTC2006 benchmarks running on a 2.66 GHz Intel Core i7 920. As the equation on page 35 explains, execution time is the product of the three factors in this table: instruction count in billions, clocks per instruction (CPI), and clock cycle time in nanoseconds.
SPECratio is simply the reference time, which is supplied by SPEC, divided by the measured execution time. The single number quoted as SPECINTC2006 is the geometric mean of the SPECratios.
SPEC Integer Benchmarks Performance 22
CS@VT Computer Organization II ©2005-2015 Ribbens & McQuain
Move to multi-processor
Single-processor Evolution Performance 23
CS@VT Computer Organization II ©2005-2015 Ribbens & McQuain