A multiplexor is a device that takes a number of data inputs and selects one of them to pass through as its output.
The interface of a multiplexor provides means to control which data input value is selected.
If there are K data input signals, then at least log K bits are needed to specify which input signal is to be passed through.
So, in most cases, multiplexors take 2n data input signals and n control signals.
Multiplexor
Plexors and Shifters 1
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Consider a 21 x 1 multiplexor; it takes two data inputs D0 and D1 and a single select bit S:
OutputD D SD D SD D SD D S 01010101
(D D )D S(D D)D S 001 110
DSDS 01
2 x 1 multiplexor
D0
D1
S
Output
0
0
0
0
0
0
1
0
0
1
0
0
0
1
1
1
1
0
0
1
1
0
1
0
1
1
0
1
1
1
1
1
Designing a Multiplexor
Plexors and Shifters 2
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OutI0S1S0 I1S1S0 I2S1S0 I3S1S0
A 4×2 Multiplexor
Plexors and Shifters 3
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A decoder selects a single data output line to set high.
Typically, there are 2n possible destinations and, therefore, n bits to specify the destination.
Decoders
Plexors and Shifters 4
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A demultiplexor takes a single data input and passes that input through to a single, selectable destination.
Typically, there are 2n possible destinations and, therefore, n bits to specify the destination.
Demultiplexor
Plexors and Shifters 5
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Demultplexor applied to clock signal supports selection of register to write to
Write register number comes from machine instruction
Data to be written comes from… somewhere
Read register number comes from machine instruction
Multiplexor supports selection of register to read from
Data just read goes … somewhere
Application of Plexors
Plexors and Shifters 6
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We have seen that efficient bit shifting is important because:
– bit shifts provide a simple way to perform multiplication/division
– bit shifts are often needed when applying masks to a data value
Fixed shifts are easily implemented in hardware:
Bit Shifts
Plexors and Shifters 7
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Selectable shifts can be made time-efficient by careful use of 2×1 multiplexors:
This is a 4-bit barrel shifter that supports right logical shifts of a 4-bit operand.
The operand can be shifted 0, 1, 2, or 3 positions to the right.
It requires two levels of 4 multiplexors each, with a total of 4 gate delays (ignoring inverters).
Note how the inputs to the multiplexors are arranged…
Barrel Shifter
Plexors and Shifters 8
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