Operating Systems Lecture 10a
Dr Ronald Grau School of Engineering and Informatics Spring term 2018
Previously 1 Logical file system
Provides file interface (e.g., system calls) File organisation module
Manages block allocation to files E.g. i-nodes in UNIX
Basic file system
Block-based storage format
E.g. FAT-32, NTFS, ext4
I/O device drivers
Physical access to storage media E.g. HD, DVD, USB
Recap: Questions 2 Recap questions
1. Which factors have an impact on maximum volume storage capacity?
2. Which factors have an impact on the maximum file size?
3. What are the effects of different block sizes?
4. How can we detect or prevent inconsistencies in a file system?
5. What is journaling?
6. What are the advantages/disadvantages of a write-through cache?
Bad blocks 3
Stable storage 4
Guaranteed consistent data on disk?
E.g. two disks, write same data to each sequentially:
Today 5 Logical file system
Provides file interface (e.g., system calls) File organisation module
Manages block allocation to files E.g. i-nodes in UNIX
Basic file system
Block-based storage format
E.g. FAT-32, NTFS, ext4
I/O device drivers
Physical access to storage media E.g. HD, DVD, USB
I/O System 6
Probably the most complex part of an OS
(and the “ugliest” – remember lecture 1a?)
Numerous devices with different needs and properties
Continuously optimised and updated to support new devices
Device drivers interact with hardware (without abstraction)
Parts written in assembly language, error-prone
I/O Devices
Human-machine interface: display, keyboard, audio, video, . . . Sensors, actuators, storage, network communication, printers, . . .
Bus architecture 7
I/O device properties 8
Data rates 9
I/O Subsystem 10
Layered I/O Structure 11
I/O Controller 12 Interface for communication between device driver and device
Registers:
Data-in: data read by device driver
Data-out: data written by device driver
Status: read by device driver
e.g. command completion, byte available to read, error
Control: written by device driver
e.g. command, communication and device configuration
Simple example of lower-level operations
1602 LCD display / HD44780 MCU
Small display with an integrated controller
2 lines, 16 characters each
80 bytes of RAM
8 bits for data, 3 bits for control
Simple instruction set (init, cursor, clear screen, etc.)
RS (register-select) control bit determines if what is sent
is an instruction (RS=0) or data (RS=1)
R/W mode (wait for not-busy / send instruction or data) – (R/W=0 for writing)
Supports 2×4-bit or 1×8-bit data transfers
pixelrz.com
Simple example of lower-level operations
1602 LCD display / HD44780 MCU
pixelrz.com
Toulson & Wilmshurst, pg. 151
Simple example of lower-level operations
1602 LCD display / HD44780 MCU – Essential initialization procedure
Set RS & E pins to 0
Configure function mode
Width of data packets (4 or 8 bits)
Number of display lines used (1 or 2) 8 Symbol size (5×8 or 5×10 pixels)
Configure display mode Display on/off
Cursor on/off Cursor blinking
Adapted from Toulson & Wilmshurst, pg. 154/155
I/O Controller Example: UART 16550 16
I/O Interaction Protocols 17 Programmed I/O
1. Transfer data from main memory into I/O registers
2. Send I/O command
3. Wait for completion by busy waiting
4. Transfer results from I/O registers into main memory
I/O Interaction Protocols 18 Interrupt-driven I/O
1. Setup interrupt and interrupt service routine (ISR)
2. Transfer data from main memory into I/O registers
3. Send I/O command
4. On completion, ISR transfers results from I/O registers into main memory
I/O Interaction Protocols 19 Direct Memory Access I/O (DMA)
1. Send I/O command to DMA controller
2. DMA controller handles data transfer from/to main memory
3. DMA controller interrupts to signal completion
Programmed I/O – Example 20 Also known as polling.
Example: Output data transfer:
1. Device driver repeatedly reads busy bit until clear.
2. Device driver writes data into data-out register and sets the write command bit, and continues busy waiting.
3. Controller notices the write command bit set and sets the busy bit.
4. Controller reads data-out register and sends data to device.
5. Controller clears write command bit, clears error bit in status register if transfer succeeded, and clears busy bit to indicate that it is finished.
6. Device driver detects that the transfer is complete.
Polling example: UART 16550 21
Interrupt-driven I/O – Example 22
Interrupt Example: UART 16550 23
Controlling Interrupts 24
HW-provided mechanisms
Global disabling
Selective disabling (masking)
Priorities
Interrupt „scheduling”?
Some OS execute ISRs as kernel threads.
Direct Memory Access (DMA) I/O 25 Programmed I/O and low-level interrupt-driven I/O
Waste a lot of CPU cycles
Better handled by specialised hardware: DMA Controller
Handles transfer autonomously
Bottleneck: bus
“Steals” bus cycles from CPU
Device must support DMA
Direct Memory Access (DMA) I/O 26 Example: Reading data from a hard disk drive
Non-blocking I/O 27
1. Process initiates I/O
2. Process continues execution
3. Notification by callback in a separate thread item “Asynchronous”
Blocking I/O 28
1. Process initiates I/O
2. Process blocks
3. OS unblocks process when I/O finished 4. “Synchronous”
I/O Queue 29
Summary 30
I/O System
I/O device properties Layered structure
I/O controller
Device driver
Interaction protocols
Polling
Interrupts
Direct memory access (DMA)
Blocking vs non-blocking I/O
Read 31 Tanenbaum & Bos., Modern Operating Systems
Chapter 5
Silberschatz et al., Operating System Concepts Chapter 13
Next Lecture
32
Introduction
Operating System Architectures Processes
Threads – Programming
Process Scheduling – Evaluation Process Synchronisation
Deadlocks
Memory Management
File Systems
Input / Output (continued) Security and Virtualisation