代写 R C data structure algorithm Scheme AI graph software network EE20084: C Programming Coursework

EE20084: C Programming Coursework
S. R. Pennock & B. W. Metcalfe February 11, 2019
1 Introduction
This programming coursework is designed to allow you to develop your C programming skills in the context of an engineering problem. The main objective of the coursework is to write a program that should analyse an electrical circuit, as described below. There are a number of extensions possible to the main objective that will allow you to gain additional marks. There is an all day laboratory session where the main aim is producing a Design Report on what is to be implemented, and one and a half days laboratory session where you should implement, debug and test the code. You are, of course, free to develop and test the code in your own time. Automated tests will be used on your submission to assess a mark and so it is critically important that you ensure that your code complies with the syntax and file formats described in this document.
2 The Objective
Your objective is to write a program that analyses cascade circuits, such as shown in Figure 2.1, where series and shunt resistances of any value can be connected in any order between a source and a load. This is exactly the same problem that underpins expensive circuit analysis software. For these circuits the ABCD matrix analysis scheme outlined in the Appendix is a natural, and simple, way to analyse the circuit.
I11 R1 2
VS V1
R3 3 R4
0
4
R7
5 R9 6
IL
ZS
ZL
IL Figure 2.1: A cascade circuit of series and shunt resistances. Node numbers, 1 to 6 in this case,
I1
are used to define how components are connected. Node zero is the common connection.
1
R2 V2
R5 R6
R8
R10 VL

􏰰􏰪􏰼􏰭 􏰺􏰽􏰶 􏰵􏰶􏰬􏰭
􏰵􏰻􏰴􏰫􏰭􏰸􏰹 􏰪􏰵􏰬 􏰭􏰱􏰺􏰰􏰭􏰸 􏰪
􏰁 􏰸􏰭􏰹􏰱􏰹􏰺􏰪􏰵 􏰭 􏰢􏰔􏰊􏰈􏰛 􏰠􏰰􏰴􏰹 􏰶􏰸 􏰪
􏰓􏰘􏰜􏰢􏰘􏰥􏰜􏰤􏰕
􏰶􏰵􏰬􏰻 􏰺􏰪􏰵 􏰭 􏰛􏰔􏰊􏰈􏰢 􏰣􏰭􏰱􏰴􏰭􏰵􏰹􏰇
EE20084: C Programming Coursework
Your program must perform the following tasks:
1. Read in the circuit input file using the format specified below. 2. Analyse the circuit to evaluate the requested output variables. 3. Write the output variables to a file in the specified format.
You may extend the work in any way that you wish, so long as it is obvious and does not inter- fere with completion of the automated tests. For example your program may display a graphical representation of the circuit under analysis. Your program should display a message that explains any such extensions you chose to make.
3 Input and Output file formats and syntax
The files that describe the circuit (the input) and the results (the output) are described here. Your program should be as tolerant as possible of format errors in the input files and as precise as possible in the format of the output files. Note that because an automated tester will be used to assess your output files you must comply exactly with the file format described here.
3.1 Input file
The input file contains a description of the circuit that is to be analysed. Line that start with the hash symbol (#) are comments. The input file will contain three blocks, each of which is described in greater detail below:
CIRCUIT block: This is delimited by and . It defines the components in the circuit and how they are connected to each other.
TERMS block: This is delimited by and . It defines the source and the load.
OUTPUT block: This is delimited by and . It defines the output file- name to use, the variables to be printed out into the file and the units to be used for each variable.
The following example is available on the Moodle site as ‘test_circuit_1.dat’.
3.1.1 CIRCUIT block
The start of the CIRCUIT block is indicated by the xml style text and the end by . Each resistor component in the circuit is defined by two node numbers, one for each end of the component, and either its resistance, R, or its conductance G=1/R.
􏰁 􏰬􏰭􏰮􏰱􏰵􏰭 􏰪
􏰁 􏰙􏰳􏰭􏰴􏰭􏰵􏰺􏰹
􏰱􏰸 􏰻􏰱􏰺 􏰫􏰭􏰺􏰽􏰭􏰭􏰵 􏰓􏰘􏰜􏰢􏰘􏰥􏰜􏰤􏰕 􏰪􏰵􏰬 􏰓􏰈􏰘􏰜􏰢􏰘􏰥􏰜􏰤􏰕 􏰬􏰭􏰳􏰱􏰴􏰱􏰺􏰭􏰸􏰹
S. R. Pennock & B. W. Metcalfe
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February 11, 2019

􏰵􏰊􏰔􏰊 􏰵􏰋􏰔􏰋 􏰢􏰔􏰍􏰐
EE20084: C Programming Coursework
􏰵􏰊􏰔􏰋 􏰵􏰋􏰔􏰉 􏰢􏰔􏰊􏰉􏰉
􏰵􏰊􏰔􏰋 􏰵􏰋􏰔􏰌 􏰢􏰔􏰊􏰎􏰉
􏰵􏰊􏰔􏰌 􏰵􏰋􏰔􏰍 􏰢􏰔􏰌􏰌􏰉
􏰵􏰊􏰔􏰍 􏰵􏰋􏰔􏰉 􏰛􏰔􏰉􏰇􏰉􏰊􏰋􏰎
􏰵􏰊􏰔􏰍 􏰵􏰋􏰔􏰉 􏰢􏰔􏰑􏰋
􏰵􏰊􏰔􏰍 􏰵􏰋􏰔􏰎 􏰢􏰔􏰋􏰎
􏰵􏰊􏰔􏰎 􏰵􏰋􏰔􏰉 􏰢􏰔􏰋􏰑􏰉
􏰁 􏰶􏰴􏰷􏰶􏰵􏰭􏰵􏰺􏰹 􏰬􏰶 􏰵􏰶􏰺 􏰰􏰪􏰼􏰭 􏰺􏰶 􏰮􏰶􏰳􏰳􏰶􏰽 􏰺􏰰􏰭􏰱􏰸 􏰶􏰸􏰬􏰭􏰸 􏰱􏰵 􏰺􏰰􏰭 􏰱􏰸 􏰻􏰱􏰺
􏰵􏰊􏰔􏰏 􏰵􏰋􏰔􏰉 􏰢􏰔􏰊􏰉􏰉
􏰵􏰊􏰔􏰎 􏰵􏰋􏰔􏰏 􏰛􏰔􏰉􏰇􏰉􏰋
􏰓􏰈􏰘􏰜􏰢􏰘􏰥􏰜􏰤􏰕
Note that components do not have to be specified in the order that they appear in the circuit, the node numbers show how the components are connected.
3.1.2 TERMS block
The TERMS block defines the source and the load attached to the circuit.
I11
I1 1 IS RS V1
The source is implicitly connected between node 0, the common node, and node 1.
The source may be given as a Thevenin source or a Norton source.
VS V1
I1
00
I1
The load is connected between the implicit
node 0 and the node specified. Figure 3.1:
􏰁 􏰬􏰭􏰮􏰱􏰵􏰭 􏰺􏰰􏰭 􏰺􏰭􏰸􏰴􏰱􏰵􏰪􏰺􏰱􏰶􏰵􏰹 􏰫􏰭􏰺􏰽􏰭􏰭􏰵 􏰓􏰤􏰙􏰢􏰞􏰣􏰕
􏰪􏰵􏰬 􏰓􏰈􏰤􏰙􏰢􏰞􏰣􏰕 􏰬􏰭􏰳􏰱􏰴􏰱􏰺􏰭􏰸􏰹
􏰶􏰰􏰴􏰹 􏰶􏰵􏰵􏰭 􏰺􏰭􏰬
􏰓􏰤􏰙􏰢􏰞􏰣􏰕
􏰁 􏰪 􏰎􏰦 􏰤􏰰􏰭􏰼􏰭􏰵􏰱􏰵
􏰼􏰶􏰳􏰺􏰪􏰯􏰭 􏰹􏰶􏰻􏰸 􏰭 􏰽􏰱􏰺􏰰 􏰢􏰣􏰔􏰎􏰉
􏰁 􏰫􏰭􏰺􏰽􏰭􏰭􏰵 􏰵􏰶􏰬􏰭 􏰊 􏰪􏰵􏰬 􏰺􏰰􏰭 􏰱􏰴􏰷􏰳􏰱
􏰱􏰺 􏰶􏰴􏰴􏰶􏰵 􏰂􏰉􏰃 􏰵􏰶􏰬􏰭
􏰹􏰶􏰻􏰸 􏰭 􏰽􏰱􏰺􏰰 􏰢􏰣􏰔􏰋􏰎 􏰠􏰰􏰴􏰹
􏰦􏰤􏰔􏰎 􏰢􏰣􏰔􏰎􏰉
􏰁 􏰶􏰸 􏰪 􏰋􏰇􏰎 􏰖􏰴􏰷
􏰁􏰜􏰟􏰔􏰋􏰇􏰎 􏰢􏰣􏰔􏰋􏰎
􏰁􏰜􏰟􏰔􏰋􏰇􏰎 􏰛􏰣􏰔􏰉􏰇􏰉􏰍
􏰟􏰶􏰸􏰺􏰶􏰵 􏰻􏰸􏰸􏰭􏰵􏰺
􏰁 􏰳􏰶􏰪􏰬 􏰶􏰵􏰵􏰭 􏰺􏰭􏰬 􏰫􏰭􏰺􏰽􏰭􏰭􏰵 􏰵􏰶􏰬􏰭 􏰏 􏰪􏰵􏰬 􏰺􏰰􏰭 􏰱􏰴􏰷􏰳􏰱 􏰱􏰺 􏰶􏰴􏰴􏰶􏰵 􏰂􏰉􏰃
􏰏 􏰢􏰝􏰔􏰐􏰎
􏰓􏰈􏰤􏰙􏰢􏰞􏰣􏰕
RS
Thevenin and Norton sources. Equivalent when VS = IS RS.
S. R. Pennock & B. W. Metcalfe Page 3 February 11, 2019

EE20084: C Programming Coursework
3.1.3 OUTPUT block
The OUTPUT block defines the desired output of the circuit analysis, including a filename where the output variables will be written. It defines which variables are to be written, in what order, and the units to be written for each variable. By default the units for a variable are linear, and are decibels if dB is specified. The variables to be output can be:
• Vin – Input Voltage
• Iin – Input Current
• Pin – Input Power
• Zin – Input Impedance • Vout – Output Voltage • Iout – Output Current • Pout – Output Power
• Zout – Output Impedance • Av – Voltage Gain
• Ai – Current Gain
Note: input values are defined as being measured between nodes 0 and 1 (through node 1 for current), output values are defined as being measured between the node 0 and the load node that is defined in the TERMS block of the input file.
􏰁 􏰬􏰭􏰮􏰱􏰵􏰭 􏰺􏰰􏰭 􏰶􏰻􏰺􏰷􏰻􏰺􏰹 􏰫􏰭􏰺􏰽􏰭􏰭􏰵
􏰓􏰠􏰥􏰤􏰡􏰥􏰤􏰕
􏰁 􏰹􏰷􏰭 􏰱􏰮􏰾 􏰮􏰱􏰳􏰭􏰵􏰪􏰴􏰭 􏰮􏰶􏰸 􏰶􏰻􏰺􏰷􏰻􏰺
􏰚􏰱􏰳􏰭􏰩􏰵􏰪􏰴􏰭􏰔􏰞􏰾􏰩􏰘􏰱􏰸 􏰻􏰱􏰺􏰇􏰬􏰪􏰺
􏰦􏰱􏰵
􏰦􏰶􏰻􏰺 􏰬􏰗
􏰜􏰱􏰵
􏰜􏰶􏰻􏰺
􏰡􏰱􏰵 􏰬􏰗
􏰨􏰶􏰻􏰺
􏰡􏰶􏰻􏰺
􏰨􏰱􏰵
􏰖􏰼 􏰬􏰗
􏰖􏰱
􏰓􏰈􏰠􏰥􏰤􏰡􏰥􏰤􏰕
􏰓􏰠􏰥􏰤􏰡􏰥􏰤􏰕
􏰪􏰵􏰬 􏰓􏰈􏰠􏰥􏰤􏰡􏰥􏰤􏰕
􏰬􏰭􏰳􏰱􏰴􏰱􏰺􏰭􏰸􏰹
S. R. Pennock & B. W. Metcalfe
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3.1.4 Output file format
EE20084: C Programming Coursework
The output file written by your program should be contain the values described by the block in a comma separated format. The first line of the output file should list the variable types. The second line of the output file should be the units for the output variables and the third line is the variable values. The units for a linear gain should be L.
Example output file:
􏰦􏰱􏰵􏰅 􏰦􏰶􏰻􏰺􏰅 􏰜􏰱􏰵􏰅 􏰜􏰶􏰻􏰺􏰅 􏰡􏰱􏰵􏰅 􏰨􏰶􏰻􏰺􏰅 􏰡􏰶􏰻􏰺􏰅 􏰨􏰱􏰵􏰅 􏰖􏰼􏰅 􏰖􏰱
􏰦􏰅 􏰬􏰗􏰦􏰅 􏰖􏰅 􏰖􏰅 􏰬􏰗􏰧􏰅 􏰠􏰰􏰴􏰹􏰅 􏰧􏰅 􏰠􏰰􏰴􏰹􏰅 􏰬􏰗􏰅 􏰝
􏰊􏰇􏰉􏰉􏰉􏰉􏰭􏰄􏰉􏰋􏰅 􏰊􏰇􏰌􏰒􏰐􏰒􏰭􏰄􏰉􏰋􏰅 􏰊􏰇􏰉􏰉􏰉􏰉􏰭􏰆􏰉􏰊􏰅 􏰊􏰇􏰉􏰉􏰉􏰉􏰭􏰆􏰉􏰊􏰅
4 Additional features
􏰉􏰇􏰉􏰉􏰉􏰉􏰭􏰄􏰉􏰉􏰅
􏰊􏰇􏰎􏰉􏰉􏰉􏰭􏰄􏰉􏰋􏰅
􏰎􏰇􏰉􏰉􏰉􏰉􏰭􏰆􏰉􏰊􏰅 􏰊􏰇􏰉􏰉
The following additional features can be added in order to gain more marks.
4.1 Exponent prefixes
Add the exponent prefixes (p, n, u, m, k, M, G) and use them in reading and writing all input and output variables.
Symbol
Prefix
Factor
p
pico
10−12
n
nano
10−9
u
micro (μ)
10−6
m
milli
10−3
k
kilo
103
M
mega
106
G
giga
109
4.2 Sub-circuits
Add the ability to define several CIRCUITS with names in an input file, and add CCT as an element in the input files in order to use these sub-circuits to create a larger circuit. For example:
􏰓􏰘􏰜􏰢􏰘􏰥􏰜􏰤􏰅 􏰵􏰪􏰴􏰭􏰔􏰀 􏰺􏰩􏰊􏰀􏰕
􏰵􏰊􏰔􏰊 􏰵􏰋􏰔􏰋 􏰢􏰔􏰍􏰐
􏰵􏰊􏰔􏰋 􏰵􏰋􏰔􏰉 􏰢􏰔􏰉􏰇􏰊 􏰲
􏰵􏰊􏰔􏰋 􏰵􏰋􏰔􏰌 􏰢􏰔􏰊􏰎􏰉
􏰓􏰈􏰘􏰜􏰢􏰘􏰥􏰜􏰤􏰕
􏰓􏰘􏰜􏰢􏰘􏰥􏰜􏰤􏰅 􏰵􏰪􏰴􏰭􏰔􏰀
􏰺􏰩􏰵􏰭􏰽􏰀􏰕
S. R. Pennock & B. W. Metcalfe
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􏰁 􏰱􏰵􏰷􏰻􏰺 􏰴􏰣􏰱􏰭􏰴􏰭􏰵􏰹
􏰓􏰠􏰥􏰤􏰡􏰥􏰤􏰕
􏰁 􏰹􏰷􏰭 􏰱􏰮􏰾 􏰮􏰱􏰳􏰭􏰵􏰪􏰴􏰭 􏰮􏰶􏰸 􏰶􏰻􏰺􏰷􏰻􏰺
􏰚􏰱􏰳􏰭􏰩􏰵􏰪􏰴􏰭􏰔􏰞􏰾􏰩􏰘􏰱􏰸 􏰻􏰱􏰺􏰇􏰬􏰪􏰺
􏰁 􏰹􏰷􏰭
􏰦􏰱􏰵􏰇
􏰦􏰶􏰻􏰺􏰇
􏰱􏰮􏰾 􏰴􏰱􏰳􏰳􏰱􏰼􏰶􏰳􏰺
􏰺􏰩􏰪􏰳􏰳 􏰴
􏰺􏰩􏰪􏰳􏰳 􏰬􏰗
􏰶􏰻􏰺􏰷􏰻􏰺 􏰮􏰶􏰸 􏰦􏰱􏰵
􏰶􏰮 􏰺􏰩􏰪􏰳􏰳
􏰖􏰼􏰇 􏰺􏰩􏰪􏰳􏰳 􏰬􏰗
􏰖􏰼􏰇 􏰺􏰩􏰊 􏰬􏰗
􏰖􏰼􏰇 􏰺􏰩􏰵􏰭􏰽 􏰬􏰗
􏰓􏰈􏰠􏰥􏰤􏰡􏰥􏰤􏰕
EE20084: C Programming Coursework
􏰵􏰊􏰔􏰊 􏰵􏰋􏰔􏰋 􏰛􏰔􏰊􏰋􏰇􏰎 􏰴
􏰵􏰊􏰔􏰊 􏰵􏰋􏰔􏰉 􏰢􏰔􏰊􏰒􏰉
􏰵􏰊􏰔􏰋 􏰵􏰋􏰔􏰌 􏰢􏰔􏰋􏰎
􏰓􏰈􏰘􏰜􏰢􏰘􏰥􏰜􏰤􏰕
􏰓􏰘􏰜􏰢􏰘􏰥􏰜􏰤􏰅 􏰵􏰪􏰴􏰭􏰔􏰀 􏰺􏰩􏰪􏰳􏰳􏰀􏰕
􏰵􏰊􏰔􏰊 􏰵􏰋􏰔􏰋 􏰘􏰘􏰤􏰔 􏰺􏰩􏰊
􏰵􏰊􏰔􏰋 􏰵􏰋􏰔􏰌 􏰘􏰘􏰤􏰔 􏰺􏰩􏰵􏰭􏰽
􏰓􏰈􏰘􏰜􏰢􏰘􏰥􏰜􏰤􏰕
Here two sub-circuits called cct_1 and cct_new are defined, and are connected together in cct_all. In this simple case node 3 of cct_1 becomes connected to node 1 of cct_new.
The OUTPUT block should then be able to identify the individual sub-circuits:
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EE20084: C Programming Coursework
5 Workplan
5.1 Tutorial Sessions
There is a tutorial session each Friday at 13:15. In the tutorial sessions up to week 8 there are stand-alone tasks designed to help you understand particular parts of the lecture course, these are available on Moodle. The tutorial sessions from week 9 to 11 in are left clear for you to do exploratory work on your analysis program.
5.2 First Laboratory session, week 5
During the first all-day laboratory session you should develop your Design Document, and attempt to create the basic I/O framework for your program. At the end of this session you should have the majority of the Design Document and a program that is reads in the input file and writes out test data correctly. You should include in your program a dummy analysis that produces a dummy solution for output.
5.3 Second Laboratory session, week 9 and 10
In the second laboratory session you should try to implement the analysis program itself and record all the needed test data. You can also work in your own time, as all campus computers will have Visual Studio installed.
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EE20084: C Programming Coursework
6 Assessment
There are three assessments for the coursework in this unit, and the Marking Rubric that will be used can be seen on the Moodle site:
Design Document: The design document for your circuit analysis program should be submitted via Moodle by 4pm on March 14th 2019.
It should not include blocks of C code, but it should include:
• Analysis of the problem so that your program will analyse any circuit defined in the input file format, the outline code structure you are proposing in terms of functions or functional blocks and the data flow through them. Flowcharts can be a simple tool to describe the structure and flow of the program.
• A description of every function or functional block you plan to implement as a part of your program, and how each one is to be tested.
• A description of every data structure, array and enumerated variable you plan to im- plement as a part of your analysis program.
Typically the design can be expressed in 3 or 4 pages. 10% of the Unit mark will be awarded
for this.
Circuit analysis program – Code: Your circuit analysis program executable for the automated
test mark. This is due in via Moodle by 4pm on May 10th 2019.
You will need to submit an executable (.exe) file that will be auto tested and a zip file of your code (.h and .c files only). Do NOT submit your whole project directory (marks will be deducted if you do this).
Your submitted executable will run through a set of automated tests, and the results will form part of your marks. The source code will be recompiled if need be, for example if the source code and executable do not match. Make sure that your program runs as expected on the computers in the undergraduate labs. Source code will be inspected for good readability, commenting and coding standards according to the EE20084 coding standards document (available on Moodle).
40% of the marks will be awarded for this.
Circuit analysis program – Final Report: This should be should be submitted via Moodle by 4pm on the May 10th 2019. The report should cover the description of how the finished code operates, documentation of the code, the testing strategy and test records used on components of the code, and the testing strategy and test records used on the complete code.
40% of the marks will be awarded for this.
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EE20084: C Programming Coursework
7 Opportunities for feedback
Various opportunities for feedback exist during the unit. There are tutorial sessions and laboratory sessions where you can gain feedback from lecturers and demonstrators. In addition the will be feedback on the design document that you submit via Moodle.
Labs/tutorials: At the end of the lab/tutorial session, consider whether you have successfully completed the tasks for that session or not:
Struggling: “The code didn’t work and I don’t know why”
Basic: “The code compiled and sort of worked”.
Advanced: “ I was able to spot out algorithmic and syntax errors before compilation. I tested
the code in detail and it always works the way that it should”.
Software: We will provide feedback on software submitted (both the executable and the source code)
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EE20084: C Programming Coursework
A ABCD or Chain Matrix Analysis
The ABCD matrix relates voltages and currents at the input and output connection ports of a circuit. The ABCD matrix is also known as the chain matrix or voltage transmission matrix. The ABCD matrix formulation is particularly useful for the cascade connection of components, which is a very common and natural way for components to be connected.
V1
I1 I2 I3 I4
Figure A.1: Cascade of three 2-port circuits.
V4
􏰿 A1 B1 􏱀 C1 D1
Figure A.1 shows three components connected in cascade. The ABCD matrix of the whole circuit is simply found by multiplying the ABCD matrices of the elements in the order that they appear in the circuit:
􏰿AB􏱀 = 􏰿A1B1 􏱀􏰿A2B2 􏱀􏰿A3B3 􏱀 (1) C D C1 D1 C2 D2 C3 D3
A.1 Definition of the ABCD matrix
Consider a linear two-port circuit with voltages V1 and V2 and currents I1 and I2 at the two ports.
I1 I2
V1 =AV2+BI2 I1 =CV2+DI2
V1
V2
􏰿AB􏱀 CD
V2
􏰿 A2 B2 􏱀 C2 D2
V3
􏰿 A3 B3 􏱀 C3 D3
The equation set is cast into the ABCD matrix form as
􏰿V1 􏱀 = 􏰿AB􏱀􏰿V2 􏱀 = [T]􏰿V2 􏱀 I1 CDI2 I2
(2)
This can be simply inverted to find:
􏰿V2 􏱀 = [T]−1􏰿V1 􏱀 = 1 􏰿 D −B􏱀􏰿V1 􏱀 (3)
I2 I1 AD−BC −C A I1
The four parameters of the matrix can be determined by examination of the circuit with open
and short circuit load conditions.
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EE20084: C Programming Coursework
A.2 Examples of ABCD Matrices Series Resistance
R
I1 V1
Shunt Conductance
I2
V2
I2
In the case of a series resistance, R, the ABCD matrix is:
􏰿AB􏱀=􏰿1R􏱀 (4) CD 01
In the case where the shunt element is a conductance G = 1/Rsh:
􏰿AB􏱀=􏰿10􏱀 (5) CD G1
I1
V1
A.3
V2
G
Cascade of several circuit elements
The cascade connection is a very common way of connecting components. Consider the case where there are several two-port circuits in cascade.
V1
I1 I2 I3 I4
Figure A.2: Cascade of three 2-port circuits.
V4
􏰿 A1 B1 􏱀 C1 D1
V2
􏰿 A2 B2 􏱀 C2 D2
V3
􏰿 A3 B3 􏱀 C3 D3
The behaviour of the overall circuit is determined by the ABCD matrices of the elements of the cascade:
􏰿V1 􏱀 = 􏰿A1 B1 􏱀􏰿V2 􏱀 = [T1]􏰿V2 􏱀 I1 C1D1I2 I2
􏰿V2 􏱀 = 􏰿A2 B2 􏱀􏰿V3 􏱀 = [T2]􏰿V3 􏱀 I2 C2D2I3 I3
􏰿V3 􏱀 = 􏰿A3 B3 􏱀􏰿V4 􏱀 = [T3]􏰿V4 􏱀 I3 C3D3I4 I4
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EE20084: C Programming Coursework
Relating the voltages and currents from left to right:
􏰿 V1 􏱀 = [T1]􏰿 V2 􏱀 I1 I2
= [T1][T2]􏰿V3 􏱀 I3
= [T1][T2][T3]􏰿V4 􏱀 = 􏰿An Bn 􏱀􏰿V4 􏱀 (7) I4 Cn Dn I4
So the ABCD matrix of the cascade network is determined by multiplying together the ABCD matrices of the elements in the order they appear in the cascade circuit. This is why the matrix is sometimes referred to as the chain or voltage transmission matrix.
Observation
For a general cascade circuit the overall ABCD matrix is simply the multiple of the ABCD matrices of the individual components of the cascade, in the order that they occur in the cascade:
[Tn] = [T1] [T2] [T3] …[TM] (8)
From the ABCD matrix of the complete cascade network various features of the complete
network are easily found, such as input impedance, voltage gain, current gain, power gain…..
A.4 Input and output impedance
When a load, ZL, is connected at the end of the cascade V4 = ZL and the input impedance as
I4
seen by the source, Zin is
Zin = V1 = AnV4 + BnI4 = n I4 n = AnZL + Bn (9)
AV4 +B
I C V + D I C V4 + D C Z + D
1 n4 n4 nI4 n nL n
When a source, ZS, is connected the output impedance as seen at the load end, Zout is
A.5
As V4 I4
Zout = DnZS + Bn CnZS + An
Voltage, current and power gain
= ZL = 1 using the base definition of the ABCD matrix: YL
(10)
(11)
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the voltage gain is:
V1 = AnV4 + BnI4 = AnV4 + BnV4YL AV = V4 = 1
V1 An + BnYL S. R. Pennock & B. W. Metcalfe Page 12

EE20084: C Programming Coursework
Likewise
and the current gain is:
A.6 Transmittance
I1 = CnV4 + DnI4 = CnI4ZL + DnI4 (13) AI = I4 = 1 (14)
The power gain is:
where the complex conjugate of the current gain is needed.
I1 CnZL + Dn
AP =AVA∗I (15)
The transmittance from source to load is:
T= 2 (16)
AnZL + Bn + CnZLZS + DnZS A.7 Familiarisation Exercises
It is often easier to develop functions or programs to implement an algorithm if you can perform the operations yourself ’by-hand’. Examples that you are convinced are correct often (always?) form test cases for you to prove your software programs against.
These familiarisation exercises illustrate the basic steps that are needed to perform an ABCD matrix circuit analysis.
Example 1
I11R1 2
IL
ZS
VS V1
Question 1
InthecasewhereZS =R1 =R2 =ZL = 50Ω calculate the ABCD matrix, Zin and Av.
ZL
I1 IL Figure A.3: A two element cascade circuit of
series and shunt resistances.
Question 2
In the case where ZS = ZL = 50Ω and R1 = R2 = 150Ω calculate the ABCD matrix, Zin and Av.
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R2 V2

EE20084: C Programming Coursework
Question 3
InthecasewhereZS =ZL =50Ω,R1 =R2 =150ΩandVs =5VoltscalculateV1, I1, V2 and IL.
Example 2
I11 R22
IL
ZS
VS V1
Question 4
InthecasewhereZS =R1 =R2 =ZL = 50Ω calculate the ABCD matrix, Zin and Av.
ZL
I1 IL Figure A.4: A two element cascade circuit of
shunt and series resistances.
Question 5
In the case where ZS = ZL = 50Ω and R1 = R2 = 150Ω calculate the ABCD matrix, Zin and Av.
Question 6
InthecasewhereZS =ZL =50Ω,R1 =R2 =150ΩandVs =5VoltscalculateV1, I1, V2 and IL.
S. R. Pennock & B. W. Metcalfe Page 14 February 11, 2019
R1
V2