Instructions:
CS/ECE 252 Introduction to Computer Engineering
Spring 2020 Instructor: Adil Ibrahim
Project I: The WISC-SC252 Processor
In this project, you will describe and design a “partial” instruction set architecture (ISA) for the WISC-SC252 processor. You should consult the information in Part A and answer all questions in Part B.
Please submit your project as a PDF file.
PART A: WISC-SC252 Microarchitecture Specification
Summary
The WISC-SC252 processor is an 8-bit microarchitecture. It bears some resemblance to the LC-3
processor described in the textbook (see Figure 1).
Figure 1: LC-3 data path
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Registers
There are four registers in the WISC-SC252 processor, R0-R3. Each register is 8 bits in size.
Memory
The WISC-SC252 processor follows the Von Neumann Architecture, meaning that data and instructions use the same memory.
Instruction formats
The WISC-SC252 processor has three types of instructions: O-format, D-format, and J-format. O-format Instructions
O-format instructions represent all operate instructions, i.e. all instructions carried out by the ALU (see Figures 2 and 2.1). The following are general specifications for the O family of instructions:
Bit[7] = 1, which activates the ALU.
An operate instruction may have at most two registers: SR (source) and SD (both source
and destination).
Figure 3 shows all operate instructions that the ALU can perform. Opcode assignment
should follow the same ordering as in the figure. D-format Instructions
D-format instructions are concerned with data movement between the WISC-SC252 processor and the memory. The logic circuit in Figure 4 (focus on the dashed rectangle) shows how the WISC-SC252 processor performs D-format instructions. General specifications of the data movement instructions are given below:
Bit[7] = 0.
LOAD and STORE are two important instructions in this set. Figure 4 shows how the
WISC-SC252 processor differentiates between these instructions. The codes of these two instructions are given below:
o LOAD has code 0 o STORE has code 1
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J-format Instructions
J-format instructions represent the set of all jump instructions. There are several instructions in this set, including instructions that depend on flags. The WISC-SC252 processor has the following set of flags:
As in used
C: Carry-out bit
A: A is a larger number (using comparator – see problem 3.30 in the textbook) E:AandBareequal
Z: Zero
D-format instructions, all J-format instructions have bit[7] = 0. Figure 5 shows the logic for one control instruction.
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Figure 2: The ALU in the WISC-SC252 processor
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Figure 2.1a: Enabler and its internal logic
Figure 2.1b: Full adder
Figure 2.1c: SHL/SHR left- and right-shifter
Figure 2.1d: Shifter logic Figure 2.1: Some of the internal components of the WISC-SC252 ALU
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Figure 3: ALU and operate instructions
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Figure 4: Logic circuit for data movement instructions (LOAD and STORE)
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Figure 5: Logic circuit for selecting jump instructions
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PART B: Questions
1. Using the LC-3 data path given in Figure 1, draw the WISC-SC252 data path. Your diagram should show all essential components. You should define each component and describe its function.
2. The specifications of the WISC-SC252 architecture explain the three types of instructions, O- format, D-format, and J-format. Consider the example below and answer questions (a) and (b).
Example: The SHR instruction format
Or simply
(a) Using the given specifications and diagrams, suggest a suitable format for the rest of the operate (O-format) instructions.
(b) Figure 4 shows the logic used to select the data movement instruction. Suggest a suitable format for the LOAD and STORE instructions.
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3. JC, JA, JE, and JZ are a group of instructions in the J-format family. They are based on the four flags C, A, E, and Z, and each plays a role in changing the execution sequence of a program. For each of these instructions, the address to jump to is stored in the next memory location (e.g. if a JC instruction appears at address 3, then address 4 contains the address to jump to). AND gate number 101 in Figure 5 corresponds to the instruction that uses these flags.
Answer the following questions:
(a) What is the format of the Jump instruction in Figure 5?
(b) In the WISC-SC252 processor, it is possible to test more than one flag bit with a single instruction. What is the maximum number of jump instructions we can have using the four flags?
(c) Draw the logic diagram that selects among the instructions JC, JA, JE, and JZ (corresponding to the FLAGS LOGIC box in Figure 5).
4. Answer the following questions:
(a) What is the maximum number of instructions the WISC-CS252 processor can support? (b) What is the maximum memory size (in bytes) the WISC-CS252 processor can support? (c) What is the addressability of the WISC-CS252 memory?
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