LC4 Instruction Set
Instructions
BRn IMM9
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BRnp IMM9
BRz IMM9
BRzp IMM9
BRp IMM9
BRnzp IMM9
Do Nothing
0000000———
0000100IIIIIIIII
0000110IIIIIIIII
0000101IIIIIIIII
0000010IIIIIIIII
0000011IIIIIIIII
0000001IIIIIIIII
0000111IIIIIIIII
0001dddsss000ttt
0001dddsss001ttt
0001dddsss010ttt
0001dddsss011ttt
0001dddsss1IIIII
0010sss00—-ttt
0010sss01—-ttt
0010sss10IIIIIII
0010sss11UUUUUUU
N ? PC = PC+1+SEXT(IMM9)
N|Z ? PC = PC+1+SEXT(IMM9)
N|P ? PC = PC+1+SEXT(IMM9)
Z ? PC = PC+1+SEXT(IMM9)
Z|P ? PC = PC+1+SEXT(IMM9)
P ? PC = PC+1+SEXT(IMM9)
ADD Rd Rs IMM5
Rd = Rs + SEXT(IMM5)
NZP = signed-CC(Rs-Rt)
NZP = unsigned-CC(Rs-Rt)
NZP = signed-CC(Rs-SEXT(IMM7)) NZP = unsigned-CC(Rs-UIMM7)
Rt Rt Rt Rt
CMPU Rs Rt
CMPI Rs IMM7
CMPIU Rs UIMM7
JSR IMM11
LEA R1
LC R1
.ADDR UIMM16
.FILL IMM16
.BLKW UIMM16
.CONST IMM16
.UCONST UIMM16
Rd = Rs & SEXT(IMM5)
Rd = dmem[Rs + SEXT(IMM6)] dmem[Rs + SEXT(IMM6)] = Rt PC=R7;PSR[15]=0
Rd = SEXT(IMM9)
01000–sss——
0101dddsss000ttt
0101dddsss001—
0101dddsss010ttt
0101dddsss011ttt
0101dddsss1IIIII
0110dddsssIIIIII
0111tttsssIIIIII
1000———–
1001dddIIIIIIIII
1010dddsss00UUUU
1010dddsss01UUUU
1010dddsss10UUUU
1010dddsss11-ttt
11000–sss——
11001IIIIIIIIIII
1101ddd1UUUUUUUU
1111—-UUUUUUUU
IIIIIIIIIIIIIIII
0000000000000000
PC = PC+1+SEXT(IMM11) Rd=(Rd&0xFF)|(UIMM8<<8) R7=PC+1;PC=(x8000|UIMM8);PSR[15]=1
Pseudo-Instructions
R1 = address of label
R1 = constant at label
Assembly Directives
current memory is data
current memory is code
set current address to UIMM16
pad current address to 16-word boundary
set value at current address to IMM16
reserve UIMM16 words at current address
associate IMM16 with preceding label
associate UIMM16 with preceding label
<< UIMM4 >>> UIMM4 >> UIMM4 %Rt
001: opcode or sub-opcode
ddd: d-register, sss: s-register, ttt: t-register
III: signed immediate, UUU: unsigned immediate, —: don’t care
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