Embedded Systems with ARM Cortex-M Microcontrollers in Assembly Language and C (Dr. Yifeng Zhu)
Chapter 3 ARM Instruction Set Architecture
ECE 3375b Electrical and Computer Engineering Western University
Winter 2019
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History
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ARM Cortex Processors
ARM Cortex-A family:
Applications processors
Support OS and high- performance applications
Such as Smartphones, Smart TV
ARM Cortex-R family:
Real-time processors with high
performance and high reliability
Support real-time processing and mission-critical control
ARM Cortex-M family:
Microcontroller
Cost-sensitive, support SoC
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Instruction Sets
4 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu) Chapter 3
Instruction Sets
5
from arm.com
From C to Assembly
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Load-Modify-Store
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Load-Modify-Store
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ARM Cortex-M3 Organization (STM32L1)
SW/JTAG
Instruction Bus
Data Bus System Bus
Instructions
Data
SRAM
Cortex-M3 Processor Core
`
Flash Memory
Memory Protection Unit (MPU)
Interrupts
Advanced High- performance Bus (AHB)
APB1
ABP2
Advanced Peripheral Bus (APB)
AHB to APB Bridge 1
AHB to APB Bridge 2
GPIO Port A GPIO Port B GPIO Port C GPIO Port D GPIO Port E GPIO Port H
EXT ADC WKUP TIM9 SPI1 TIM10 USART1 TIM11
Direction Memory Access (DMA) Controller
System-on-a-chip
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Chapter 3
LCD SPI2 TIM2 I2C1 TIM4 I2C2
TIM6 USB 2.0 FS
TIM7 DAC1
USART2 DAC2
USART3 USB RAM
WWDG
Interrupt Controller (NVIC)
Trace & Debug Interface
Processor Control Unit
ALU Instruction Decoder Instruction Fetch Unit
AHB Bus Matrix
Memory Interface
ARM Cortex-M4 Organization (STM32L4)
SW/JTAG
Instruction Bus
Data Bus System Bus
Instructions
Data
SRAM
Cortex-M4 Processor Core
Memory Protection Unit (MPU)
` Interrupts
Advanced High- performance Bus (AHB)
APB1
ABP2
Advanced Peripheral Bus (APB)
AHB to APB Bridge 1
AHB to APB Bridge 2
GPIO Port A GPIO Port B GPIO Port C GPIO Port D GPIO Port E GPIO Port F GPIO Port G GPIO Port H
EXTI
WKUP
TIM1/PWM SAI2 TIM8/PWM DFSDM TIM15
TIM16
TIM17
USART1
SPI1 SAI1
Direction Memory Access (DMA) Controllers
System-on-a-chip
COMP1 COMP2 Firewall
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Chapter 3
LCD SPI2
TIM2 SPI3
TIM3 I2C1/SMBUS
TIM4 I2C2/SMBUS
TIM6 I2C3/SMBUS
TIM7 USB 2.0 FS
USART2 bxCAN
USART3 SWPMI1
USART4 LPTIM1
USART5 LPTIM2
LPUART1 OpAmp
Flash Memory
Interrupt Controller (NVIC)
Trace & Debug Interface Processor Control Unit
Single Instruction Multiple Data (DSP)
FPU (optional)
ALU Instruction Decoder Instruction Fetch Unit
AHB Bus Matrix
Memory Interface
Assembly Instructions Supported
Arithmetic and logic
Add, Subtract, Multiply, Divide, Shift, Rotate
Data movement
Load, Store, Move
Compare and branch
Compare, Test, If-then, Branch, compare and branch on zero
Miscellaneous
Breakpoints, wait for events, interrupt enable/disable, data
memory barrier, data synchronization barrier
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ARM Instruction Format
label mnemonic operand1, operand2, operand3 ; comments
Label is a reference to the memory address of this instruction.
Mnemonic represents the operation to be performed.
The number of operands varies, depending on each specific instruction. Some instructions have no operands at all.
Typically, operand1 is the destination register, and operand2 and operand3 are source operands.
operand2 is usually a register.
operand3 may be a register, an immediate number, a register shifted to a
constant amount of bits, or a register plus an offset (used for memory access).
Everything after the semicolon “;” is a comment, which is an annotation explicitly declaring programmers’ intentions or assumptions.
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ARM Instruction Format
label
mnemonic operand1, operand2, operand3
target ADD r0, r2, r3
label mnemonic destination 1st source operand operand
; comments
; r0 = r2 + r3
2nd source operand
comment
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Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu) Chapter 3
ARM Instruction Format
label mnemonic operand1, operand2, operand3
Examples: Variants of the ADD instruction
; comments
ADD r1, r2, r3 ADD r1, r3 ADD r1, r2, #4 ADD r1, #15
; r1 = r2 + r3 ; r1 = r1 + r3 ; r1 = r2 + 4 ; r1 = r1 + 15
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Chapter 3
First Assembly
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First Assembly
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First Assembly
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Assembly Directives
Directives are NOT instruction. Instead, they are used to provide key information for assembly.
AREA
Make a new block of data or code
ENTRY
Declare an entry point where the program execution starts
ALIGN
Align data or code to a particular memory boundary
DCB
Allocate one or more bytes (8 bits) of data
DCW
Allocate one or more half-words (16 bits) of data
DCD
Allocate one or more words (32 bits) of data
SPACE
Allocate a zeroed block of memory with a particular size
FILL
Allocate a block of memory and fill with a given value.
EQU
Give a symbol name to a numeric constant
RN
Give a symbol name to a register
EXPOR T
Declare a symbol and make it referable by other source files
IMPOR T
Provide a symbol defined outside the current source file
INCLUDE/GE T
Include a separate source file within the current source file
PROC
Declare the start of a procedure
ENDP
Designate the end of a procedure
END
Designate the end of a source file
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Directive: AREA
Array
__main
AREA myData, DATA, READWRITE ; Define a data section
DCD 1, 2, 3, 4, 5 ; Define an array with five integers
AREA myCode, CODE, READONLY ; Define a code section
EXPORT __main ENTRY
PROC
…
ENDP END
; Make __main visible to the linker
; Mark the entrance to the entire program ; PROC marks the begin of a subroutine
; Assembly program starts here.
; Mark the end of a subroutine
; Mark the end of a program
The AREA directive indicates to the assembler the start of a new data or code section.
Areas are the basic independent and indivisible unit processed by the linker.
Each area is identified by a name and areas within the same source file cannot share the same name.
An assembly program must have at least one code area.
By default, a code area can only be read (READONLY) and a data area may be read from
and written to (READWRITE).
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Directive: ENTRY
Array
__main
AREA myData, DATA, READWRITE ; Define a data section
DCD 1, 2, 3, 4, 5 ; Define an array with five integers
AREA myCode, CODE, READONLY ; Define a code section
EXPORT __main
ENTRY
PROC … ENDP END
; Make __main visible to the linker
; Mark the entrance to the entire program ; PROC marks the begin of a subroutine
; Assembly program starts here.
; Mark the end of a subroutine
; Mark the end of a program
The ENTRY directive marks the first instruction to be executed within an application program.
There must be exactly one ENTRY directive in an application, no matter how many source files the application has.
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Directive: END
Array
__main
AREA myData, DATA, READWRITE ; Define a data section
DCD 1, 2, 3, 4, 5 ; Define an array with five integers
AREA myCode, CODE, READONLY ; Define a code section
EXPORT __main ENTRY
PROC
…
ENDP
END
; Make __main visible to the linker
; Mark the entrance to the entire program ; PROC marks the begin of a subroutine
; Assembly program starts here.
; Mark the end of a subroutine
; Mark the end of a program
The END directive indicates the end of a source file. Each assembly program must end with this directive.
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Directive: PROC and ENDP
Array
__main
AREA myData, DATA, READWRITE ; Define a data section
DCD 1, 2, 3, 4, 5 ; Define an array with five integers
AREA myCode, CODE, READONLY ; Define a code section
EXPORT __main ENTRY
PROC
…
ENDP
END
; Make __main visible to the linker
; Mark the entrance to the entire program ; PROC marks the begin of a subroutine
; Assembly program starts here.
; Mark the end of a subroutine
; Mark the end of a program
PROC and ENDP are to mark the start and end of a function (also called subroutine or procedure).
A single source file can contain multiple subroutines, with each of them defined by a pair of PROC and ENDP.
PROC and ENDP cannot be nested. We cannot define a function within another function.
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Directive: EXPORT and IMPORT
Array
__main
AREA myData, DATA, READWRITE ; Define a data section
DCD 1, 2, 3, 4, 5 ; Define an array with five integers
AREA myCode, CODE, READONLY ; Define a code section
EXPORT __main
ENTRY PROC … ENDP END
; Make __main visible to the linker
; Mark the entrance to the entire program ; PROC marks the begin of a subroutine
; Assembly program starts here.
; Mark the end of a subroutine
; Mark the end of a program
The EXPORT declares a symbol and makes this symbol visible to the linker.
The IMPORT gives the assembler a symbol that is not defined locally in the current
assembly file. The symbol must be defined in another file. The IMPORT is similar to the “extern” keyword in C.
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Directive: Data Allocation
Directive
Description
Memory Space
DCB
Define Constant Byte
Reserve 8-bit values
DCW
Define Constant Half-word
Reserve 16-bit values
DCD
Define Constant Word
Reserve 32-bit values
DCQ
Define Constant
Reserve 64-bit values
DCFS
Define single-precision floating-point numbers
Reserve 32-bit values
DCFD
Define double-precision floating-point numbers
Reserve 64-bit values
SPACE
Defined Zeroed Bytes
Reserve a number of zeroed bytes
FILL
Defined Initialized Bytes
Reserve and fill each byte with a value
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Directive: Data Allocation
AREA myData, DATA, READWRITE
hello DCB
dollar DCB
scores DCD
miles DCW
Pi DCFS
Pi DCFD
p SPACE
f FILL
binary DCB 2_01010101 octal DCB 8_73 char25 DCB ‘A’
; Allocate a string that is null-terminated ; Allocate integers ranging from -128 to 255 ; Allocate 4 words containing decimal values ; Allocate integers between –32768 and 65535 ; Allocate a single-precision floating number ; Allocate a double-precision floating number ; Allocate 255 bytes of zeroed memory space
; Allocate 20 bytes and set each byte to 0xFF ; Allocate a byte in binary
; Allocate a byte in octal
; Allocate a byte initialized to ASCII of ‘A’
“Hello World!”,0
2,10,0,200
2,3.5,-0.8,4.0
100,200,50,0
3.14
3.14
255
20,0xFF,1
Directive: EQU and RN
; Interrupt Number Definition (IRQn)
BusFault_IRQn
SVCall_IRQn
PendSV_IRQn
SysTick_IRQn
Dividend
Divisor
EQU -11 EQU -5 EQU -2 EQU -1
RN 6 RN 5
; Cortex-M3 Bus Fault Interrupt
; Cortex-M3 SV Call Interrupt
; Cortex-M3 Pend SV Interrupt
; Cortex-M3 System Tick Interrupt
; Defines dividend for register 6
; Defines divisor for register 5
The EQU directive associates a symbolic name to a numeric constant. Similar to the use of #define in a C program, the EQU can be used to define a constant in an assembly code.
The RN directive gives a symbolic name to a specific register.
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Directive: ALIGN
AREA example, CODE, ALIGN = 3 ADD r0, r1, r2
AREA myData, DATA, ALIGN = 2
a DCB 0xFF
ALIGN 4, 3
b DCB 0x33
c DCB 0x44
ALIGN
d DCD 12345
; Memory address begins at a multiple of 8
; Instructions start at a multiple of 8
; Address starts at a multiple of four
; The first byte of a 4-byte word
; Align to the last byte (3) of a word (4) ; Set the fourth byte of a 4-byte word
; Add a byte to make next data misaligned ; Force the next data to be aligned
; Skip three bytes and store the word
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Directive: INCLUDE or GET
INCLUDE constants.s
AREA main, CODE, READONLY
EXPORT __main
ENTRY
__main PROC …
ENDP END
; Load Constant Definitions
The INCLUDE or GET directive is to include an assembly source file within another source file.
It is useful to include constant symbols defined by using EQU and stored in a separate source file.
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Assembler Directives used with
the Intel® FPGA Monitor Program1
Different assemblers often use different assembler directives. Assembler directives begin with a period. Some of the more
frequently used assembler directives:
.ascii “string”
A string of ASCII characters is loaded into consecutive byte addresses in the memory.
.asciz “string”
It is the same as .ascii, except that each string is terminated by a zero byte.
.byte expressions
Expressions separated by commas are specified. Each expression is assembled into the next byte.
.end
Marks the end of the source code file; everything after this directive is ignored by the assembler.
.equ symbol, expression
Sets the value of symbol to expression.
.global symbol
Makes symbol visible outside the assembled object file.
.hword expressions
Expressions separated by commas are specified. Each expression is assembled into a 16-bit number.
.include “filename”
Provides a mechanism for including supporting files in a source program.
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1 From “Introduction to the ARM* Processor Using Intel® FPGA Toolchain, Intel Corporation – FPGA University Program, November 2017.”
Assembler Directives used with
the Intel® FPGA Monitor Program1 (cont.)
.section arguments
Allows a named section to be created in the assembly language file. This directive is used, for example, when
specifying exception vectors.
.skip size
Emits the number of bytes specified in size; the value of each byte is zero.
.text
Identifies the code that should be placed in the text section of the memory. The desired memory location for the text section can be specified in the Monitor Program’s system configuration window.
.word expressions
Expressions separated by commas are specified. Each expression is assembled into a 32-bit number.
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1 From “Introduction to the ARM* Processor Using Intel® FPGA Toolchain, Intel Corporation – FPGA University Program, November 2017.”