Embedded Systems with ARM Cortex-M Microcontrollers in Assembly Language and C (Dr. Yifeng Zhu)
Chapter 6 Flow Control in Assembly
ECE 3375b Electrical and Computer Engineering Western University
Winter 2019
1
Overview
If-then-else While loop
For loop
2 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu) Chapter 6
Comparison Instructions
Instruction Operands
Brief description Flags
CMP Rn, Op2
Compare N, Z, C, V
CMN Rn, Op2 Compare Negative N,Z,C,V
TEQ Rn, Op2
Test Equivalence N,Z,C
TST Rn, Op2 Test N,Z,C
➢ The only effect of the comparisons is to update the condition flags.
• No need to set S bit.
• No need to specify Rd.
➢ Operations are:
• CMP
• CMN
• TST
• TEQ
➢ Examples:
operand1 – operand2, but result not written operand1 + operand2, but result not written operand1 & operand2, but result not written operand1 ^ operand2, but result not written
r0, r1 r2, #5
3
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu)
Chapter 6
• •
CMP TST
CMP and CMN
CMP{cond} Rn, Operand2 CMN{cond} Rn, Operand2
The CMP instruction subtracts the value of Operand2 from the value in Rn. This is the same as a SUBS instruction, except that the result is discarded.
The CMN instruction adds the value of Operand2 to the value in Rn.
This is the same as an ADDS instruction, except that the result is discarded.
These instructions update the N, Z, C and V flags according to the result.
4 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu) Chapter 6
Example of CMP
𝑓𝑥 =|𝑥|
Area absolute, CODE, READONLY
EXPORT __main
ENTRY
__main PROC
CMP r1, #0
RSBLT r0, r1, #0 done B done ; deadloop
ENDP END
Note: RSB = Reverse SuBtract
5 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu) Chapter 6
TST and TEQ
TST{cond} Rn, Operand2 ; Bitwise AND TEQ{cond} Rn, Operand2 ; Bitwise Exclusive OR
The TST instruction performs a bitwise AND operation on the value in Rn and the value of Operand2.
This is the same as a ANDS instruction, except that the result is discarded. The TEQ instruction performs a bitwise Exclusive OR operation on the
value in Rn and the value of Operand2.
This is the same as a EORS instruction, except that the result is discarded. Update the N and Z flags according to the result
Can update the C flag during the calculation of Operand2
Do not affect the V flag.
6
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu) Chapter 6
Branch Instructions
Instruction Operands Brief description Flags
B label Branch –
BL label Branch with Link –
BLX Rm Branch indirect with Link –
BX Rm Branch indirect –
B label: causes a branch to label.
BL label: instruction copies the address of the next instruction into r14 (lr,
the link register), and causes a branch to label.
BX Rm: branch to the address held in Rm
BLX Rm: copies the address of the next instruction into r14 (lr, the link register) and branch to the address held in Rm
7 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu) Chapter 6
Branch With Link
The “Branch with link (BL)” instruction implements a subroutine call by writing PC+4 into the LR of the current bank.
i.e. the address of the next instruction following the branch with link
To return from subroutine, simply need to restore the PC from the LR:
MOV pc, lr
Again, pipeline has to refill before execution continues.
The “Branch” instruction does not affect LR.
8 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu) Chapter 6
Condition Codes
Suffix
Description
Flags tested
EQ
EQual
NE
Not Equal
CS/HS
Unsigned Higher or Same
CC/LO
Unsigned LOwer
MI
MInus (Negative)
PL
PLus (Positive or Zero)
VS
oVerflow Set
VC
oVerflow Clear
HI
Unsigned HIgher
LS
Unsigned Lower or Same
GE
Signed Greater or Equal
LT
Signed Less Than
GT
Signed Greater Than
LE
Signed Less than or Equal
AL
ALways
Note AL is the default and does not need to be specified
9 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu) Chapter 6
Condition Codes
The possible condition codes are listed below:
Suffix
Description
Flags tested
EQ
EQual
Z=1
NE
Not Equal
Z=0
CS/HS
Unsigned Higher or Same
C=1
CC/LO
Unsigned LOwer
C=0
MI
MInus (Negative)
N=1
PL
PLus (Positive or Zero)
N=0
VS
oVerflow Set
V=1
VC
oVerflow Clear
V=0
HI
Unsigned HIgher
C=1 & Z=0
LS
Unsigned Lower or Same
C=0 or Z=1
GE
Signed Greater or Equal
N=V
LT
Signed Less Than
N!=V
GT
Signed Greater Than
Z=0 & N=V
LE
Signed Less than or Equal
Z=1 or N!=V
AL
ALways
Note AL is the default and does not need to be specified
10 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu) Chapter 6
Signed Greater or Equal ( N == V)
CMP r0, r1
We in fact perform subtraction r0 – r1, without saving the result.
N=0
N=1
V=0
• No overflow, implying the result is correct.
• The result is non-negative,
• Thus r0 – r1 ≥ 0, i.e., r0 ≥ r1
• No overflow, implying the result is correct.
• The result is negative.
• Thus r0 – r1 < 0, i.e., r0 < r1
V=1
• Overflow occurs, implying the result is incorrect.
• The result is mistakenly reported as non-negative and in fact it should be negative.
• Thus r0 – r1 < 0 in reality, i.e., r0 < r1
• Overflow occurs, implying the result is incorrect.
• The result is mistakenly reported as negative and in fact it should be non- negative.
• Thus r0 – r1 ≥ 0 in reality., i.e. r0 ≥ r1
Conclusions:
• •
If N == V, then it is signed greater or equal (GE). Otherwise, it is signed less than (LT)
11
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu)
Chapter 6
Signed vs. Unsigned
Conditional codes applied to branch instructions
Compare
Signed
Unsigned
==
EQ
EQ
≠
NE
NE
>
GT
HI
≥
GE
HS
<
LT
LO
≤
LE
LS
Compare
Signed
Unsigned
==
BEQ
BEQ
!=
BNE
BNE
>
BGT
BHI
>=
BGE
BHS
<
BLT
BLO
<=
BLE
BLS
12 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu) Chapter 6
Branch Instructions
Instruction
Description
Flags tested
Uncondition al Branch
B label
Branch to label
Conditional Branch
BEQ label
Branch if EQual
Z=1
BNE label
Branch if Not Equal
Z=0
BCS/BHS label
Branch if unsigned Higher or Same
C=1
BCC/BLO label
Branch if unsigned LOwer
C=0
BMI label
Branch if MInus (Negative)
N=1
BPL label
Branch if PLus (Positive or Zero)
N=0
BVS label
Branch if oVerflow Set
V=1
BVC label
Branch if oVerflow Clear
V=0
BHI label
Branch if unsigned HIgher
C=1&Z=0
BLS label
Branch if unsigned Lower or Same
C = 0 or Z = 1
BGE label
Branch if signed Greater or Equal
N=V
BLT label
Branch if signed Less Than
N != V
BGT label
Branch if signed Greater Than
Z=0&N=V
BLE label
Branch if signed Less than or Equal
Z = 1 or N = !V
13 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu) Chapter 6
Number Interpretation
Which is greater?
0xFFFFFFFF or 0x00000001
If they represent signed numbers, the latter is greater (1 > -1).
If they represent unsigned numbers, the former is greater (4294967295=232-1 > 1).
14 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu) Chapter 6
Which is Greater: 0xFFFFFFFF or 0x00000001?
It’s software’s responsibility to tell computer how to interpret data:
• If written in C, declare the signed vs unsigned variable
• If written in Assembly, use signed vs unsigned branch instructions
MOVS r6, #0xFFFFFFFF MOVS r5, #0x00000001 CMP r5, r6
BLE Then_Clause …
signed int x, y ; x = -1;
y = 1;
if (x > y)
…
BLE: Branch if less than or equal, signed ≤
MOVS r6, #0xFFFFFFFF MOVS r5, #0x00000001 CMP r5, r6
BLS Then_Clause …
unsigned int x, y ; x = 4294967295;
y = 1;
if (x > y)
…
BLS: Branch if lower or same, unsigned ≤
15 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu)
Chapter 6
If-then Statement
C Program
if (a < 0 ) {
a = 0 – a;
}
x = x + 1;
Implementation 1:
; r1 = a, r2 = x
CMP r1, #0 ; Compare a with 0
BGE endif ; Go to endif if a ≥ 0
then RSBr1,r1,#0 ;a=-a endif ADDr2,r2,#1 ;x=x+1
16 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu) Chapter 6
If-then Statement
C Program
if (a < 0 ) {
a = 0 – a;
}
x = x + 1;
Implementation 2:
; r1 = a, r2 = x
CMP r1, #0 ; Compare a with 0 RSBLTr1,r1,#0 ;a=0-aifa<0 ADD r2,r2,#1 ;x=x+1
17 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu) Chapter 6
Compound Boolean Expression
x > 20 && x < 25
x == 20 || x == 25
!(x == 20 || x == 25)
C Program
Assembly Program
// x is a signed integer
if(x <= 20 || x >= 25){
a=1 }
; r0 = x CMP r0, #20 BLE then CMP r0, #25 BLT endif
; compare x and 20 ;gotothenifx≤20 ; compare x and 25 ;gotoendififx<25
then MOV r1,#1 ;a=1 endif
18 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu) Chapter 6
If-then-else
C Program
if (a == 1)
b = 3;
else
b = 4;
; r1 = a, r2 = b
CMP r1, #1 ; compare a and 1 BNEelse ;gotoelseifa≠1
then MOVr2,#3 ;b=3
B endif ; go to endif
else MOVr2,#4 ;b=4 endif
19 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu) Chapter 6
For Loop
C Program
int i;
int sum = 0;
for(i = 0; i < 10; i++){
sum += i; }
Implementation 1:
MOVr0,#0 ;i MOVr1,#0 ;sum
B check
loop ADD r1, r1, r0 ADD r0, r0, #1
check CMPr0,#10
BLT loop
endloop
20 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu) Chapter 6
For Loop
C Program
int i;
int sum = 0;
for(i = 0; i < 10; i++){
sum += i; }
Implementation 2:
MOVr0,#0 ;i MOV r1, #0 ; sum
loop CMP r0, #10 BGE endloop
endloop
ADD r1, r1, r0
ADD r0, r0, #1
B loop
21 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu) Chapter 6
Combined Program Status Registers (xPSR)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7
6 5
Reserved
4 3
2 1 0
N
Z
C
V
Q
IT[7:6]
T
Reserved
IT[5:0]
Interrupt/Exception Number
Thumb state flag
Stick saturation flag for SSAT and USAT
Overflow flag
Carry/Borrow flag
Zero flag
Negative or less than flag
IT[7:0]: If-Then bits
22 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu)
Chapter 6
Combined Program Status Registers (xPSR)
N
Z
C
V
Q
Reserved
Reserved
ISR number
ICI/IT
T
Reserved
ICI/IT
N
Z
C
V
Q
ICI/IT
T
Reserved
ICI/I T
ISR number
Application PSR (APSR)
Interrupt PSR (IPSR)
Execution PSR (EPSR)
Combined PSR (xPSR)
23
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu)
Chapter 6
bit31
bit24
bit16
XPSR = APSR + IPSR + EPSR
bit8
bit0
Condition Codes
The possible condition codes are listed below:
Suffix
Description
Flags tested
EQ
Equal
Z=1
NE
Not equal
Z=0
CS/HS
Unsigned higher or same
C=1
CC/LO
Unsigned lower
C=0
MI
Negative
N=1
PL
Positive or Zero
N=0
VS
Overflow
V=1
VC
No overflow
V=0
HI
Unsigned higher
C=1 & Z=0
LS
Unsigned lower or same
C=0 or Z=1
GE
Signed Greater or equal
N=V
LT
Signed Less than
N!=V
GT
Signed Greater than
Z=0 & N=V
LE
Signed Less than or equal
Z=1 or N!=V
AL
Always
Note AL is the default and does not need to be specified
24 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu) Chapter 6
Conditional Execution
Add instruction
Condition
Flag tested
ADDEQ r3, r2, r1
Add if EQual
Add if Z = 1
ADDNE r3, r2, r1
Add if Not Equal
Add if Z = 0
ADDHS r3, r2, r1
Add if Unsigned Higher or Same
Add if C = 1
ADDLO r3, r2, r1
Add if Unsigned LOwer
Add if C = 0
ADDMI r3, r2, r1
Add if Minus (Negative)
Add if N = 1
ADDPL r3, r2, r1
Add if PLus (Positive or Zero)
Add if N = 0
ADDVS r3, r2, r1
Add if oVerflow Set
Add if V = 1
ADDVC r3, r2, r1
Add if oVerflow Clear
Add if V = 0
ADDHI r3, r2, r1
Add if Unsigned HIgher
Add if C = 1 & Z = 0
ADDLS r3, r2, r1
Add if Unsigned Lower or Same
Add if C = 0 or Z = 1
ADDGE r3, r2, r1
Add if Signed Greater or Equal
Add if N = V
ADDLT r3, r2, r1
Add if Signed Less Than
Add if N != V
ADDGT r3, r2, r1
Add if Signed Greater Than
Add if Z = 0 & N = V
ADDLE r3, r2, r1
Add if Signed Less than or Equal
Add if Z = 1 or N = !V
25 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu) Chapter 6
Example of Conditional Execution
a ⟶ r0 y ⟶ r1
if (a <= 0)
y = -1;
else
y = 1;
26 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu)
Chapter 6
CMP r0, #0 MOVLE r1, #-1 MOVGT r1, #1
LE: Signed Less than or Equal GT: Signed Greater Than
Example of Conditional Execution
a ⟶ r0 y ⟶ r1
CMP r0, #1 CMPNE r0, #7 CMPNE r0, #11 MOVEQ r1, #1 MOVNE r1, #-1
if (a==1 || a==7 || a==11)
y = 1;
else
y = -1;
NE: Not Equal EQ: Equal
27 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu)
Chapter 6
Compound Boolean Expression
C Program
Assembly Program
// x is a signed integer
if(x <= 20 || x >= 25){
a = 1; }
; r0 = x, r1 = a
CMP r0, #20 ; compare x and 20
MOVLE r1, #1 ; a=1 if less or equal CMP r0, #25 ; CMP if greater than MOVGE r1, #1 ; a=1 if greater or equal
endif
28 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu) Chapter 6
Example 1: Greatest Common Divider (GCD)
Euclid’s Algorithm
uint32_t a, b; while (a != b ) {
if (a > b)
a = a – b;
else
b = b – a;
}
gcd CMP r0, r1
SUBHI r0, r0, r1
SUBLO r1, r1, r0
BNE gcd
; suppose r0 = a and r1 = b
gcd CMP r0, r1 BEQ end
; a > b?
; if a = b, done ; a < b
BLO less
SUBr0,r0,r1 ;a=a–b B gcd
less SUBr1,r1,r0 ;b=b–a B gcd
end
29 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu) Chapter 6
Example 2
foo ADDS r0, r0, r1 BPL PosOrZ
done MOV r0, #0
MOV pc, lr
PosOrZ MOV r0, r1 B done
int foo(int x, int y) {
if ( x + y < 0 )
return 0;
else
return 1; }
foo ADDS r0,r0,r1 ; r1=x+y, settingCCs
MOVPL r0,#1 MOVMI r0,#0 MOV pc, lr
; return1ifnbit=0
; return0ifnbit=1 ; exit foo function
30 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu) Chapter 6
Combination
Instruction
Operands
Brief description
Flags
CBZ
Rn, label
Compare and Branch if Zero
-
CBNZ
Rn, label
Compare and Branch if Non Zero
-
Except that it does not change the condition code flags, CBZ Rn, label is equivalent to:
CMP Rn, #0
BEQ label
Except that it does not change the condition code flags, CBNZ Rn, label is equivalent to:
CMP Rn, #0
BNE label
31 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu) Chapter 6
Break and Continue
Example code for break
Example code for continue
for(int i = 0; i < 5; i++){ if (i == 2) break; printf(“%d, ”, i)
}
for(int i = 0; i < 5; i++){ if (i == 2) continue; printf(“%d, ”, i)
}
Output: ??
Output: ??
32 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu) Chapter 6
Break and Continue
Example code for break
Example code for continue
for(int i = 0; i < 5; i++){ if (i == 2) break; printf(“%d, ”, i)
}
for(int i = 0; i < 5; i++){ if (i == 2) continue; printf(“%d, ”, i)
}
Output: 0, 1,
Output: 0, 1, 3, 4
33 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu) Chapter 6
Break and Continue
C Program
Assembly Program
// Find string length
char str[] = "hello";
int len = 0;
for( ; ; ) {
if (*str == '\0')
break;
str++;
len++; }
; r0 = string memory address
; r1 = string length
MOV r1,#0
loop LDRB r2, [r0] CBNZ r2, notZero
B endloop
notZero ADD r0, r0, #1
ADD r1, r1, #1
B loop
endloop
;len=0
; str++
; len++
34 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu) Chapter 6
Branch Instructions
Instruction
Operands
Brief description
Flags
B
label
Branch
-
BL
label
Branch with Link
-
BLX
Rm
Branch indirect with Link
-
BX
Rm
Branch indirect
-
B label: causes a branch to label.
BL label: instruction copies the address of the next instruction into r14 (lr,
the link register), and causes a branch to label.
BX Rm: branch to the address held in Rm
BLX Rm: copies the address of the next instruction into r14 (lr, the link register) and branch to the address held in Rm
35 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu) Chapter 6