Embedded Systems with ARM Cortex-M Microcontrollers in Assembly Language and C (Dr. Yifeng Zhu)
Chapter 5
Memory Access
ECE 3375b Electrical and Computer Engineering Western University
Winter 2019
Course Objective
How data is organized in memory? Big Endian vs Little Endian
How data is addressed? Pre-index
Post-index
Pre-index with update
2 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu) Chapter5
Logic View of Memory
By grouping bits together we can store more values
8bits=1byte
16 bits = 2 bytes = 1 halfword
32bits=4bytes=1word
8 bits
High Address
0x20000007 0x20000006 0x20000005 0x20000004 0x20000003 0x20000002 0x20000001 0x20000000
Low Address
01110010
00100101
11100010
10000100
01100001
10001111
00010010
10010100
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Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu)
Chapter5
Logic View of Memory
By grouping bits together we can store more values
8bits=1byte
16 bits = 2 bytes = 1 halfword
32bits=4bytes=1word
From software perspective,
memory is an addressable array of
bytes.
The byte stored at the memory address 0x20000004 is 0b10000100
0b10000100 0x84 132 Binary Hexadecimal Decimal
8 bits
High Address
0x20000007 0x20000006 0x20000005 0x20000004 0x20000003 0x20000002 0x20000001 0x20000000
Low Address
01110010
00100101
11100010
10000100
01100001
10001111
00010010
10010100
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Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu)
Chapter5
Logic View of Memory
When we refer to memory locations by address, we can only do so in units of bytes, halfwords or words
Words
32bits =4bytes =1word =2halfwords
Memory address of a word is the lowest address of all four bytes in that word.
Two words at addresses: 0x20000000
0x20000004
8 bits
High Address
0x20000007 0x20000006 0x20000005 0x20000004 0x20000003 0x20000002 0x20000001 0x20000000
Low Address
01110010
00100101
11100010
10000100
01100001
10001111
00010010
10010100
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Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu)
Chapter5
Logic View of Memory
Can you store a word anywhere?
8 bits
High Address
0x20000007 0x20000006 0x20000005 0x20000004 0x20000003 0x20000002 0x20000001 0x20000000
Low Address
01110010
00100101
11100010
10000100
01100001
10001111
00010010
10010100
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Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu)
Chapter5
Logic View of Memory
Can you store a word anywhere? NO. A word can only be stored at an address
that’s divisible by 4.
Word-address mod 4 = 0
8 bits
High Address
0x20000007 0x20000006 0x20000005 0x20000004 0x20000003 0x20000002 0x20000001 0x20000000
Low Address
01110010
00100101
11100010
10000100
01100001
10001111
00010010
10010100
We cannot store a
word at address
0x20000002.
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Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu)
Chapter5
Logic View of Memory
Halfwords
16 bits = 2 bytes = 1 halfword
The right diagram has four halfwords at addresses of:
0x20000000 0x20000002 0x20000004 0x20000006
8 bits
High Address
0x20000007
0x20000006
0x20000005
0x20000004
0x20000003
0x20000002
0x20000001
0x20000000
Low Address
01110010
00100101
11100010
10000100
01100001
10001111
00010010
10010100
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Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu)
Chapter5
Logic View of Memory
Can you store a halfword anywhere? NO. A halfword can only be stored at an address
that’s divisible by 2.
Memory address of a halfword is the lowest address of its two bytes.
Halfword-address mod 2 = 0
8 bits
High Address
0x20000007 0x20000006 0x20000005 0x20000004 0x20000003 0x20000002 0x20000001 0x20000000
Low Address
01110010
00100101
11100010
10000100
01100001
10001111
00010010
10010100
We cannot store a
halfword at address
0x20000001.
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Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu)
Chapter5
Quiz
Addr = ??
What are the memory address of these four words?
Word 2
Word 1
32-bit Words
Word 3
Bytes Addr.
0015
0014
0013
0012
0011
0010
0009
0008
0007
0006 0005
0004 0003 0002 0001 0000
Addr = ??
Addr = ??
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Word 0
Addr = ??
Quiz (Answer)
Addr = 0x0012
What are the memory address of these four words?
Word 2
Word 1
32-bit Words
Word 3
Bytes Addr.
0015
0014
0013
0012
0011
0010
0009
0008
0007
0006 0005
0004 0003 0002 0001 0000
Addr = 0x0008
Addr = 0x0004
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Word 0
Addr = 0x0000
Endianess
High address
MSB
Little Endian
LSB Low address
LSB
Big Endian
MSB
byte 3
msb
Big endian
byte 2
byte 1
byte 1 byte 0
byte 2 byte 3
Little endian
lsb
byte 0
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Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu)
Chapter5
Endianess
Little Endian
Most significant byte is stored at a high address
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Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu) Chapter5
Endianess
Little Endian
Most significant byte is stored at a high address
Big Endian
Most significant byte is stored at a low address
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Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu)
Chapter5
Endianess
Little Endian
Most significant byte is stored at a high address
Big Endian
Most significant byte is stored at a low address
Regardless endian, the address of a word is defined as the lowest address of all bytes it occupies.
ARM is Little Endian by default.
It can be made Big Endian by configuration.
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Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu) Chapter5
Example
If big endianess is used
The word stored at address 0x20008000 is
Memory Address
Memory Data
0x20008003
0xA7
0x20008002
0x90
0x20008001
0x8C
0x20008000
0xEE
0xEE8C90A7
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Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu)
Chapter5
Example
If little endianess is used
The word stored at address 0x20008000 is
Endian only specifies byte order, not bit order in a byte!
Memory Address
Memory Data
0x20008003
0xA7
0x20008002
0x90
0x20008001
0x8C
0x20008000
0xEE
0xA7908CEE
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Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu)
Chapter5
Load-Modify-Store
C statement
x = x + 1;
; Assume the memory address of x is stored in r1
LDR r0, [r1] ADD r0, r0, #1 STR r0, [r1]
; load value of x from memory ; x = x + 1
; store x into memory
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Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu) Chapter5
Load Instructions
LDR rt, [rs]
fetch data from memory into register rt.
The memory address is specified in register rs. For Example:
; Assume r0 = 0x08200004
; Load a word:
LDR r1, [r0] ; r1 = Memory.word[0x08200004]
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Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu) Chapter5
Store Instructions
STR rt, [rs]:
save data in register rt into memory
The memory address is specified in a base register rs. For Example:
; Assume r0 = 0x08200004
; Store a word
STR r1, [r0] ; Memory.word[0x08200004] = r1
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Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu) Chapter5
Single register data transfer
LDR
Load Word
LDRB
Load Byte
LDRH
Load Halfword
LDRSB
Load Signed Byte
LDRSH
Load Signed Halfword
STR
Store Word
STRB
Store Lower Byte
STRH
Store Lower Halfword
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Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu) Chapter5
Load a Byte, Half-word, Word
Load a Byte
LDRB r1, [r0]
31 0
Load a Halfword
LDRH r1, [r0]
31 0
Load a Word
LDR r1, [r0]
31 0
0x02000003 0x02000002 0x02000001 0x02000000
Little Endian
Assume r0 = 0x02000000
0x87
0x65
0xE3
0xE1
0x00
0x00
0x00
0xE1
0x00
0x00
0xE3
0xE1
0x87
0x65
0xE3
0xE1
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Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu) Chapter5
Sign Extension
Load a Signed Byte
LDRSB r1, [r0]
31 0
Load a Signed Halfword
LDRSH r1, [r0]
31 0
0x20000003 0x20000002 0x20000001 0x20000000
0x87
0x65
0xE3
0xE1
0xFF
0xFF
0xFF
0xE1
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Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu) Chapter5
Facilitate subsequent 32-bit signed arithmetic!
Little Endian
Assume r0 = 0x02000000
0xFF
0xFF
0xE3
0xE1
Address
Address accessed by LDR/STR is specified by a base register plus an offset
For word and unsigned byte accesses, offset can be
An unsigned 12-bit immediate value (i.e. 0 – 4095 bytes).
LDR r0,[r1,#8]
A register, optionally shifted by an immediate value LDR r0,[r1,r2]
LDR r0,[r1,r2,LSL#2]
This can be either added or subtracted from the base register: LDR r0,[r1,#-8]
LDR r0,[r1,-r2]
LDR r0,[r1,-r2,LSL#2]
For halfword and signed halfword / byte, offset can be: An unsigned 8 bit immediate value (i.e. 0-255 bytes).
A register (unshifted).
Choice of pre-indexed or post-indexed addressing
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Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu)
Chapter5
Pre-index
Pre-Index: LDR r1, [r0, #4]
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Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu) Chapter5
Offset range is -255 to +255
Pre-index
Pre-Index: LDR r1, [r0, #4]
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Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu) Chapter5
Offset range is -255 to +255
Post-index
Post-Index: LDR r1, [r0], #4
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Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu) Chapter5
Offset range is -255 to +255
Post-index
Post-Index: LDR r1, [r0], #4
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Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu) Chapter5
Offset range is -255 to +255
Pre-index with Updates
Pre-Index with Update: LDR r1, [r0, #4]!
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Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu) Chapter5
Offset range is -255 to +255
Pre-index with Updates
Pre-Index with Update: LDR r1, [r0, #4]!
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Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu) Chapter5
Offset range is -255 to +255
Summary of Pre-index and Post-index
Index Format
Example
Equivalent
Pre-index
LDR r1, [r0, #4]
r1 memory[r0 + 4], r0 is unchanged
Pre-index
with update
LDR r1, [r0, #4]!
r1 memory[r0 + 4] r0 r0+4
Post-index
LDR r1, [r0], #4
r1 memory[r0] r0 r0+4
Offset range is -255 to +255
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Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu) Chapter5
Example
LDRH r1, [r0]
; r0 = 0x20008000
Memory Address
Memory Data
0x20008003
0x89
0x20008002
0xAB
0x20008001
0xCD
0x20008000
0xEF
r1 before load
r1 after load
0x12345678
0x0000CDEF
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Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu)
Chapter5
Example
LDSB r1, [r0]
; r0 = 0x20008000
Memory Address
Memory Data
0x20008003
0x89
0x20008002
0xAB
0x20008001
0xCD
0x20008000
0xEF
r1 before load
r1 after load
0x12345678
0xFFFFFFEF
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Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu)
Chapter5
Example
STR r1, [r0], #4
; r0 = 0x20008000, r1=0x76543210
r0 before store
r0 after store
Memory Address
Memory Data
0x20008007
0x00
0x20008006
0x00
0x20008005
0x00
0x20008004
0x00
0x20008003
0x00
0x20008002
0x00
0x20008001
0x00
0x20008000
0x00
0x20008000
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Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu)
Chapter5
Example
STR r1, [r0], #4
; r0 = 0x20008000, r1=0x76543210
r0 before store
r0 after store
Memory Address
Memory Data
0x20008007
0x00
0x20008006
0x00
0x20008005
0x00
0x20008004
0x00
0x20008003
0x76
0x20008002
0x54
0x20008001
0x32
0x20008000
0x10
0x20008000
0x20008004
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Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu)
Chapter5
Example
STR r1, [r0, #4]
; r0 = 0x20008000, r1=0x76543210
r0 before the store
r0 after the store
Memory Address
Memory Data
0x20008007
0x00
0x20008006
0x00
0x20008005
0x00
0x20008004
0x00
0x20008003
0x00
0x20008002
0x00
0x20008001
0x00
0x20008000
0x00
0x20008000
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Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu)
Chapter5
Example
STR r1, [r0, #4]
; r0 = 0x20008000, r1=0x76543210
r0 before store
r0 after store
Memory Address
Memory Data
0x20008007
0x76
0x20008006
0x54
0x20008005
0x32
0x20008004
0x10
0x20008003
0x00
0x20008002
0x00
0x20008001
0x00
0x20008000
0x00
0x20008000
0x20008000
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Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu)
Chapter5
Example
STR r1, [r0, #4]!
; r0 = 0x20008000, r1=0x76543210
r0 before store
r0 after store
Memory Address
Memory Data
0x20008007
0x00
0x20008006
0x00
0x20008005
0x00
0x20008004
0x00
0x20008003
0x00
0x20008002
0x00
0x20008001
0x00
0x20008000
0x00
0x20008000
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Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu)
Chapter5
Example
STR r1, [r0, #4]!
; r0 = 0x20008000, r1=0x76543210
r0 before store
r0 after store
Memory Address
Memory Data
0x20008007
0x76
0x20008006
0x54
0x20008005
0x32
0x20008004
0x10
0x20008003
0x00
0x20008002
0x00
0x20008001
0x00
0x20008000
0x00
0x20008000
0x20008004
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Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu)
Chapter5
Example
If big endianess LDR r11, [r0]
is used ; r0 = 0x20008000
r11 before load
r11 after load
Memory
Address
Memory Data
0x20008003
0xEE
0x20008002
0x8C
0x20008001
0x90
0x20008000
0xA7
0x12345678
0xA7908CEE
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Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu)
Chapter5
Load/Store Multiple Registers
STMxx rn{!}, {register_list}
LDMxx rn{!}, {register_list}
xx=IA,IB,DA,orDB
Addressing Modes
Description
Instructions
IA
Increment After
STMIA, LDMIA
IB
Increment Before
STMIB, LDMIB
DA
Decrement After
STMDA, LDMDA
DB
Decrement Before
STMDB, LDMDB
• IA: address is incremented by 4 after a word is loaded or stored.
• IB: address is incremented by 4 before a word is loaded or stored.
• DA: address is decremented by 4 after a word is loaded or stored.
• DB: address is decremented by 4 before a word is loaded or stored.
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Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu) Chapter5
Load/Store Multiple Registers
The following are synonyms.
STM = STMIA (Increment After) = STMEA (Empty Ascending) LDM = LDMIA (Increment After) = LDMFD (Full Descending)
The order in which registers are listed does not matter For STM/LDM, the lowest-numbered register is stored/loaded
at the lowest memory address.
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Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu) Chapter5
Store Multiple Registers
STMxx r0!, {r3,r1,r7,r2} High Memory
STMIA
Increment After
STMIB
Increment Before
STMDA
Decrement After
STMDB
Decrement Before
Addresses
r0
r0
r7
r3
r2
r1
r7
r3
r2
r1
r7
r3
r2
r1
r7
r3
r2
r1
r0
Low Memory Addresses
r0
Full Ascending
r0
Empty Descending
Empty Ascending
Full Descending
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Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu)
Chapter5
Load Multiple Registers
LDMxx r0!, {r3,r1,r7,r2} High Memory
LDMIA
Increment After
LDMIB
Increment Before
LDMDA
Decrement After
LDMDB
Decrement Before
Addresses
r0
r0
16
12
8
4
0
-4
-8
-12
-16
16
12
8
4
0
-4
-8
-12
-16
16
12
8
4
0
-4
-8
-12
-16
16
12
8
4
0
-4
-8
-12
-16
16
12
8
4
0
-4
-8
-12
-16
r0
Low Memory Addresses
r1 = 0
r2 = 4
r3 = 8
r7 = 12
r0
r1 = 4
r2 = 8
r3 = 12
r7 = 16
r0
r1 = -12
r2 = -8
r3 = -4
r7 = -0
r1 = -16
r2 = -12
r3 = -8
r7 = -4
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Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu)
Chapter5