ECS150 FQ20
March 27, 2020
Address Translation
Lecture Notes 8
• Address Translation – Conversion of programs logical address to physical location
• Address Translation Benefits
• Process Isolation – Isolate processes from one another to avoid buggy or malicious code from affecting others
• Interprocess Communication – Can share memory region for communication
• Shared Code Segments – Can share common code
• Program Initialization – Can start running before entire program is loaded
• Efficient Dynamic Memory Allocation – Can use traps to let kernel allocate more for
heap or stack
• Cache Management – Placement in memory can help cache hits
• Program Debugging – Prevent programs from overwriting own code region
• Efficient I/O – Allows for efficient movement of data to/form I/O devices
• Memory Mapped Files – Can map a file (or part of) directly into memory
• Virtual Memory – Can provide abstraction of more memory than is physically on
machine
• Checkpointing and Restart – Store the state at a checkpoint so can restart later
• Persistent Data Structures – Can provide region of memory that can survive program
crashes
• Process Migration – Can transparently move from one system to another
• Information Flow Control – Can check the flow of private information
• Distributed Shared Memory – Network of servers can transparently be one large-scale
shared-memory system
Address Translation Concept
• Memory Protection – Ability to limit processes to certain regions of memory
• Memory Sharing – Allow sharing of regions of memory across multiple processes
• Flexible Memory Placement – Allow for the logical memory to be placed anywhere in
physical memory
• Sparse Addresses – Allow for sparse addresses
• Runtime Lookup Efficiency – Have hardware do the translation efficiently
• Compact Translation Tables – Have a low overhead for the translations
• Portability – Allow for the kernel to be ported to new hardware
• Virtual Address – Address the process sees
• Physical Address – Real locations in physical memory
Towards Flexible Address Translation
• Segmented Memory – Memory that is broken up into segments
This content is protected and may not be shared, uploaded, or distributed. Lecture Notes 8
1 of 3
ECS150 FQ20 March 27, 2020
• Segmentation – Act of breaking of memory into segments with base and bound pairs
• Segmentation Fault – A trap when memory is accessed outside its segment
• Segment-Local Address – Address that is local to the current segment
• Zero-on-reference – Zero only what is necessary, when reference more it will increase the
area that is zeroed
• External Fragmentation – Available memory is fragmented outside the allocated
segments
• Paged Memory – Allocation of memory into pages
• Page Frames – Fixed-sized memory chunk
• Core Map – Records information about each physical page frame and which point to it
• Data Breakpoint – Can be implemented in page table by marking area read only
• Internal Fragmentation – Available memory is fragmented (or unused) inside fixed
allocation chunk
• Multi-Level Translation
• Efficient memory allocation – Management is simple with fixed size pages (just bitmap)
• Efficient disk transfers – Disks use sectors, making page multiple of sector size simplifies
transfer
• Efficient lookup – Can cache the lookup
• Efficient reverse lookup – Fixed size pages makes reverse lookup easier
• Page-granularity protection and sharing – Every table entry has permissions allowing
protection of individual pages
• Paged Segmentation – Each segment points to a page table
• Multi-Level Paging – Use of multiple levels of page tables, upper level page tables point to
page tables
• Multi-level Paged Segmentation
• Global Descriptor Table – Equivalent to the segment table • Portability
• List of memory objects – Maintain list of logical segments
• Virtual to physical translation – Needs to be able to determine between invalid or not-yet
filled pages
• Physical to virtual translation – Needs to maintain core map
• Inverted Page Table – Hash table for paged address translation
Towards Efficient Address Translation
• Cache – Copy of data from memory
• Translation Lookaside Buffer – A cache of the page table
• TLB Hit – Address translation is found in the TLB (like a cache hit)
• TLB Miss – Address translation is not found in the TLB (like a cache miss)
• Superpage – Set of continuous pages in physical memory
• TLB Consistency – Potential issues when switching contexts
• TLB Flush – Discard all values in the TLB
• Tagged TLB – TLB entries contain a process tag to avoid invalid translation
• TLB Shootdown – Interrupt every processor to remove TLB entry that has changed
This content is protected and may not be shared, uploaded, or distributed. Lecture Notes 8
2 of 3
ECS150 FQ20 March 27, 2020
• Virtually Addressed Caches – Small cache that has virtual addresses
• Memory Address Alias – Using different virtual addresses for shared physical address
• Physically Addressed Caches – Larger caches that hold physical addresses Software Protection
• Sandbox – A area of memory to execute untrusted code to protect rest of the system
This content is protected and may not be shared, uploaded, or distributed. Lecture Notes 8
3 of 3