XXXday XX April 2021, xx:00 BST
(Timed open online assessment –duration 2 hours + allowed additional time)
DEGREES of MSc in Information Technology, Software Development and IT Cyber Security
System and Networks (IT) COMPSCI 4043
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Answer ALL 3 Questions
This examination paper is worth a total of 60 marks
Express the following in 32-bit two’s complement code, giving your answers in hexadecimal. Show your working.
(b) If the calculation 100 + 30 – 20 is performed by an 8-bit CPU, using an 8-bit two’s complement code, will an overflow be generated? Explain your answer and say what result you’d expect to be generated.
(c) For the mathematical set of integers, subtraction is always the same as adding the inverse of a number. Thus 3 – 2 = 3 + (-2) and 3 – (-2) = 3 + 2. Is this also true for a two’s complement code? Justify your answer.
(d) Write a Sigma16 program that accesses an array X of n 16-bit two’s complement numbers and for each element X[i] in X, stores a 0 or 1 in the corresponding element of a second array Y according to the following rule.
Y[i] = 0 if X[i] is odd; Y[i] = 1 is Y[i] is even
(e) Write a segment of Sigma16 code (not a complete program) which sets R2 to 0 if the second most significant bit in R1 is a 0, and sets R2 to 1, otherwise. Estimate how many Sigma16 cycles your segment will take to run as you’ve written it.
For reference, here is part of the instruction set of the Sigma16 CPU.
lea load store add sub mul div and inv
xor cmplt cmpeq cmpgt shiftl shiftr jumpf jumpt jal trap jump
Rd, x[Ra] Rd, x[Ra] Rd, x[Ra] Rd,Ra,Rb Rd,Ra,Rb Rd,Ra,Rb Rd,Ra,Rb Rd,Ra,Rb Rd,Ra,Rb Rd,Ra,Rb Rd,Ra,Rb Rd,Ra,Rb Rd,Ra,Rb Rd,Ra,Rb Rd,Ra,Rb Rd,Ra,Rb Rd, x[Ra] Rd, x[Ra] Rd, x[Ra] Rd,Ra,Rb x[Ra]
Rd:= x +Ra
Rd:= mem[x +Ra]
mem[x +Ra]:=Rd
Rd:= Ra+Rb
Rd:= Ra-Rb
Rd:= Ra*Rb
Rd:= Ra/Rb, R15:=Ra mod Rb
Rd:= Ra AND Rb
Rd:= NOT Ra
Rd:= Ra OR Rb
Rd:= Ra XOR Rb
Rd:= Ra
Rd:=Ra logic shifted left Rb places Rd:=Ra logic shifted right Rb places If Rd=0 then PC:=x+Ra
If Rd<>0 then PC:=x+Ra
Rd:= pc, pc: =x +Ra
PC:= interrupt handler
PC:= x +Ra
CONTINUED OVERLEAF
How do cache memories speed up program execution? Many caches only cache read cycles. Why is this and why is it usually not seen as a major limitation? Discuss whether there are circumstances where caching write cycles would provide some benefit.
(b) The following Sigma 16 code is intended to take a 10-element array of two’s complement numbers (only first element is shown) and replace all the elements with their twos complement inverse. The number $8000 is not permitted. However, although the code will assemble, it contains several errors.
i. Draw up a register use table for the program (suitable for inclusion as comment).
ii. Identify the errors and explain how you would correct them.
iii. Write out the corrected program.
LOAD R1,1[R0] ADD R2,R0,R0 LOAD R3,n[R0]
;Set R1 to constant 1 ;i:=0
;if yes, exit ;load x[i] ;R6= -x[i] ;i:=i+1 ;x[i]=-x[i] ;loop
FORLOOP CMPEQ
JUMPF R5,OUT[R0]
LOAD R4,X[R2]
INV R4,R4,R0 ADD R1,R2,R2 STORE R4,X[R2] JUMP FORLOOP[R0]
; Data Area
n DATA X DATA
(c) Estimate how many memory cycles the corrected program would take to run.
(d) In the corrected program estimate the advantage a system with a cache memory would gain if a primary memory cycle takes 10ns and a cache cycle 1ns.
CONTINUED OVERLEAF Page 2
In Internet communications, how does a router get an IP packet to its destination? Explain why the routing approach used by IP would not work with either a TCP segment or an Ethernet frame.
(b) An IP interface has the address 192.10.0.1. What binary value does this address represent? Also write the value in hex.
(c) “IP is not reliable and IP carries TCP; therefore, TCP cannot be reliable either.” Comment on the truth of the premises and conclusion of this argument and discuss whether the reasoning is valid.
(d) Many TCP connections can be running simultaneously on a given host machine. Referring to what you know about the communication system and its relationship to the operating system, explain how this is possible.
END OF EXAMINATION PAPER Page 3
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