CMPEN
Lecture 5
331
R
6 bits 5 bits 5 bits 5 bits 5 bits 6 bits
add $t0, $s1, $s2
–
format Example
op
rs
rt
rd
shamt
funct
special
$s1
$s2
$t0
0
add
0
17
18
8
0
32
000000
10001
10010
01000
00000
100000
000000100011001001000000001000002 = 0232402016
Chapter 2 — Instructions: Language of the Computer — 2
MIPS Register File
• Holds thirty-two 32-bit registers
Register File 32 bits
32 locations
• Tworeadportsand • Onewriteport
src1 addr 5
32 src1 data
32 src2 data
write control
src2 addr dst addr
write data
5
5 32
q Registers are
● Faster than main memory
– Butregisterfileswithmorelocations
are slower (e.g., a 64 word file could
be as much as 50% slower than a 32 word file)
● Can hold variables so that
– Codedensityimproves(sinceregisterarenamedwithfewerbits
than a memory location) Chapter 2 — Instructions: Language of the Computer
3
Logical Operations
• Instructions for bitwise manipulation
Operation
C
Java
MIPS
Shift left
<<
<<
sll
Shift right
>>
>>>
srl
Bitwise AND
&
&
and, andi
Bitwise OR
|
|
or, ori
Bitwise NOT
~
~
nor
n Useful for extracting and inserting groups of bits in a word
Chapter 2 — Instructions: Language of the Computer — 4
§2.6 Logical Operations
Shift Operations
op
rs
rt
rd
shamt
funct
6 bits 5 bits 5 bits 5 bits 5 bits 6 bits
• shamt: how many positions to shift
• Shift left logical
• Shiftleftandfillwith0bits • sll by i bits multiplies by 2i
• Shift right logical
• Shiftrightandfillwith0bits
• srl by i bits divides by 2i (unsigned only)
Chapter 2 — Instructions: Language of the Computer — 5
MIPS Shift
• Shifts move all the bits in a word left or right
sll $t2, $s0, 8 #$t2 = $s0 << 8 bits srl $t2, $s0, 8 #$t2 = $s0 >> 8 bits
• Instruction Format (R format) sll $t2, $s0, 8
Operations
0
16
10
8
0x00
q Such shifts are called logical because they fill with zeros
● Notice that a 5-bit shamt field is enough to shift a 32-bit value 25 – 1 or 31 bit positions
AND Operations
• Useful to mask bits in a word
• Selectsomebits,clearothersto0
and $t0, $t1, $t2
$t2 $t1
$t0
0000 0000 0000 0000 00
0000 0000 0000 0000 00
0000 0000 0000 0000 00
00 1101 1100 0000
11 1100 0000 0000
00 1100 0000 0000
Chapter 2 — Instructions: Language of the Computer — 7
OR Operations
• Useful to include bits in a word
• Setsomebitsto1,leaveothersunchanged
or $t0, $t1, $t2
$t2 $t1
$t0
0000 0000 0000 0000 0000 1101 1100 0000
0000 0000 0000 0000 0011 1100 0000 0000
0000 0000 0000 0000 0011 1101 1100 0000
Chapter 2 — Instructions: Language of the Computer — 8
NOT Operations
• Useful to invert bits in a word • Change0to1,and1to0
• MIPS has NOR 3-operand instruction • aNORb==NOT(aORb)
nor $t0, $t1, $zero
Register 0: always read as zero
0000 0000 0000 0000 0011 1100 0000 0000
$t1 $t0
1111 1111 1111 1111 1100 0011 1111 1111
Chapter 2 — Instructions: Language of the Computer — 9
MIPS Memory Access Instructions
• MIPS has two basic data transfer instructions for accessing memory
lw $t0, 4($s3) #load word from memory
sw $t0, 8($s3) #store word to memory
• The data is loaded into (lw) or stored from (sw) a register in the register file – a 5 bit address
q The memory address – a 32 bit address – is formed by adding the contents of the base address register to the offset value
● offset can be positive or negative.
10
CMPEN
Lecture 6
331
MIPS I
6 bits 5 bits 5 bits 16 bits
• Immediatearithmeticandload/storeinstructions • rs: source register number
• rt: destination or source register number
• Constant: –215 to +215 – 1
• Address: offset added to base address in rs
• DesignPrinciple4:Gooddesigndemandsgood compromises
• Keep formats as similar as possible Chapter 2 — Instructions: Language of the Computer — 12
–
format Instructions
op
rs
rt
constant or address
•
Load/Store Instruction Format (I format): lw $t0, 24($s3)
Machine Language
–
Load Instruction
35
19
8
2410 + $s3 =
2410
Memory
0xf f f f f f f f
0x120040ac 0x12004094
0x0000000c 0x00000008 0x00000004 0x00000000
. . . 0001 1000 + . . . 1001 0100
$t0 $s3
. . . 1010 1100 = 0x120040ac
data word address (hex)
MIPS Logical
• There are a number of bit-wise logical operations in the MIPS ISA
• Instruction Format (R format)
and $t0, $t1, $t2 #$t0 = $t1 & $t2
or $t0, $t1, $t2 #$t0 = $t1 | $t2
nor $t0, $t1, $t2 #$t0 = not($t1 | $t2)
• Instruction Format (I format)
andi$t0,$t1,0xFF00 #$t0=[$t1&ff00] ori $t0, $t1, 0xFF00 #$t0 = [$t1 | ff00]
Operations
Conditional Operations
• Branch to a labeled instruction if a condition is true • Otherwise,continuesequentially
• beq rs, rt, L1
• if(rs==rt)branchtoinstructionlabeledL1;;
• bne rs, rt, L1
• if(rs!=rt)branchtoinstructionlabeledL1;;
• j L1
• unconditionaljumptoinstructionlabeledL1
Chapter 2 — Instructions: Language of the Computer — 15
§2.7 Instructions for Making Decisions
Exit: …
Compiling If Statements
•
C code:
if (i==j)
f = g+h;
else f = g-h;
• f,g,h,i,j…in$s0,$s1,$s2,$s3,$s4 • CompiledMIPScode:
bne $s3, $s4, L1 #go to Else if i≠j
add $s0, $s1, $s2
j Exit #go to Exit
L1: sub $s0, $s1, $s2
Chapter 2 — Instructions: Language of the Computer — 16
Assembler calculates addresses
• C code:
Compiling Loop Statements
while (save[i] == k) i += 1;
• i in $s3, k in $s5, address of save in $s6 • Compiled MIPS code:
The first step is to load save[ i ] into a temporary register, we need to have its address first. We have to multiply the index i by 4.
Loop: sll $t1, $s3, 2 # Temp register $t1= i*4
#To get the address of save[i], we need to add $t1 and the #base of save in $s6
add $t1, $t1, $s6
lw $t0, 0($t1)
bne $t0, $s5, Exit
addi$s3,$s3,1 j Loop
Exit: …
# $t1 address of save[i]
# Temp reg $t0 = save[i]
# go to Exit if save[i] ≠ k # i=i+1
Chapter 2 — Instructions: Language of the Computer — 17
More Conditional Operations
• Set result to 1 if a condition is true • Otherwise,setto0
• slt rd, rs, rt
• if(rs
• slti rt, rs, constant
• if(rs
slt $t0, $s1, $s2 # if ($s1 < $s2)
bne $t0, $zero, L # branch to L
Chapter 2 — Instructions: Language of the Computer — 18
Signed vs. Unsigned
• Signed comparison: slt, slti
• Unsigned comparison: sltu, sltui • Example
• $s0 = 1111 1111 1111 1111 1111 1111 1111 1111
• $s1=00000000000000000000000000000001
• slt $t0, $s0, $s1 # signed
• –1<+1Þ$t0=1
• sltu $t0, $s0, $s1 # unsigned
• +4,294,967,295 > +1 Þ $t0 = 0
Chapter 2 — Instructions: Language of the Computer — 19
In Support of Branch Instructions
• Set on less than instruction:
slt $t0, $s0, $s1 # if $s0 < $s1 then # $t0 = 1 else
# $t0 = 0
• Instruction format (R format):
0
16
17
8
0x24
• slti $t0, $s0, 25 sltu $t0, $s0, $s1 sltui $t0, $s0, 25
# if $s0 < 25 then $t0=1 ...
# if $s0 < $s1 then $t0=1 ...
# if $s0 < 25 then $t0=1 ...
Chapter 2 — Instructions: Language of the Computer
20
Aside: More
• Can use slt, beq, bne, and the fixed value of 0 in register $zero to create other conditions
• lessthan
slt $at, $s1, $s2
bne $at, $zero, Label
blt$s1,$s2,Label
#$at set to 1 if $s1 < $s2
Branch
Instructions
• less than or equal to
• greaterthan
• great than or equal to bge $s1, $s2, Label
ble $s1, $s2, Label bgt$s1,$s2,Label
q Such branches are included in the instruction set as pseudo instructions - recognized (and expanded) by the assembler
● That is why, the assembler needs a reserved register ($at) Chapter 2 — Instructions: Language of the Computer
21
Branch Instruction Design
• Why not blt, bge, etc?
• Hardware for <, ≥, ... slower than =, ≠
• Combiningwithbranchinvolvesmoreworkper instruction, requiring a slower clock
• Allinstructionspenalized!
• beq and bne are the common case
• This is a good design compromise
Chapter 2 — Instructions: Language of the Computer — 22
•
Procedure Calling
Steps required
1. Place parameters in registers
2. Transfer control to procedure
3. Acquire storage for procedure
4. Perform procedure’s operations
5. Place result in register for caller
6. Return to place of call
Chapter 2 — Instructions: Language of the Computer — 23
§2.8 Supporting Procedures in Computer Hardware
Register Usage
• $a0–$a3:arguments(reg’s4–7)
• $v0,$v1:resultvalues(reg’s2and3)
• $t0–$t9:temporaries
• Can be overwritten by callee (calling program)
• $s0–$s7:saved
• Must be saved/restored by callee
• $gp:globalpointerforstaticdata(reg28) • $sp:stackpointer(reg29)
• $fp:framepointer(reg30)
• $ra:returnaddress(reg31)
Chapter 2 — Instructions: Language of the Computer — 24