HDL Chip Reference Nand (foundational chip)
out=anandb
Not : Negation gate (1 bit) out = not in
And:Andgate(1bit) out=aandb
Or:Orgate (1bit) out = a or b
Xor : Exclusive-or gate (1 bit) out=axorb
Not16 : 16-bit negation gate for i=0..15 out[i] = not in[i]
And16 : 16-bit and gate
for i=0..15 out[i] = a[i] and b[i]
Or16 : 16-bit or gate
for i=0..15 out[i] = a[i] or b[i]
Or8Way : Or gate
out = a or b or c or d or e or f or g or h
Mux : Multiplexer (1 bit) If sel=0 then out = a
else out = b
Mux16 : 16-bit multiplexor if sel=0 then out = a
else out = b
DMux : Demultiplexer (1 bit) Ifsel=0then{a=in;b=0}
else {a = 0; b = in}
HalfAdder
IN a,b; OUT sum,
carry
FullAdder
IN a,b,c OUT sum
carry
//LSBofa+b // MSB of a + b
//LSBofa+b+c // MSB of a + b + c
Add16 : 16-bit 2¡¯s complement integer adder, overflow not detected or handled IN a[16], b[16]
OUT out[16] //a+b
Inc16 : 16-bit incrementer
Overflow is neither detected nor handled IN in[16]
OUT out[16] // in + 1
DFF (foundational chip)
If load[t]=1 then out[t+1]=in[t]
else out[t+1] = out[t] (no change) IN in;
OUT out;
Bit: 1-bit register
If load[t] == 1 then out[t+1] = in[t]
else out[t+1] = out[t] (no change) IN in, load;
OUT out;
Register: 16-bit register.
If load[t]=1 then out[t+1] = in[t]
else out[t+1] = out[t] (no change) IN in[16], load;
OUT out[16];