CSE/EEE230 Spring 2020
Final Exam Due at 12PM May 6 Late Exams will be penalized 10%
The following questions should be answered as directed. There are 30 questions, all are of equal value.
Save your work as a .pdf file. Only .pdf files will be accepted. Start your file with your full name and class ID. Upload your file using the link on Canvas. Be sure to label your answers with the question number. These are short answer questions – essay answers are not expected.
I expect that all of you to be professional and will work independently. All work with be automatically checked for plagiarism. All students with a high percentage of plagiarism will receive a 0 on the exam and will be reported for an academic violation, whether you are the copier or the source, no matter the chain of copying.
Questions
1. What are the values in $t0 and $t1 after the following is executed? Label your answer with the register names.
addi $t0, $0, 7 addi $t1, $0, 5 add $t0, $t0, $t1 sub $t1, $t0, $t1 sub $t0, $t0, $t1
2. How does overflow occur when adding two positive integers?
3. An instruction is encoded as 0x01404822. What is the mnemonic for this instruction?
4. Does pipelining improve latency or throughput?
5. The decimal number 1.0 is to be represented in the IEEE754 single precision format. What is the value of the sign bit, exponent and fraction? Give your answer in binary.
6. How is the constant in the instruction used during the execution of the pseudo-direct addressing mode in MIPS?
7. The concept that items near recently accessed items are likely to be accessed is known as what?
8. A direct mapped cache holds 4 blocks. If the following block numbers are accessed, how many misses are there in the sequence? These are block numbers so they do not include the byte and word offset.
1, 3, 5, 7, 8, 7, 3
9. Assume that function “calculate” has been called using the jal instruction. As a result of this instruction execution, the $ra is set to the value 0x0040401C and the PC is set to 0x00402004. What is the address of the first instruction in “calculate”? Give your answer in hexadecimal.
10. The following code is supposed to repeat 10 times. There is an instruction missing where indicated. What instruction should appear at that place in the code?
add $t1, $0, $0
addi $t0, $0, 10
top: << missing instruction>>
add $t1, $t1, $t0 addi $t0, $t0, -1
end:j top
11. The following code is supposed to set $t0 to 4 if $t0 >= 0 or set $t0 to 0 is $t0 < 0. There is an instruction missing where indicated. What instruction should appear at that place in the code?
<< missing instruction>> bne $t1, $0, skip
ori $t0, $0, 4
j end
skip: ori $t0, $0, 0 end:
12. What are the values in $t0 and $t1 after the following sequence of code is executed? Give your answer in hexadecimal.
ori $t0, $0, 0x00F0 srl $t0, $t0, 2
sll $t1, $t0, 1
13. Assume that function “calculate” has been called using the jal instruction. As a result of this instruction execution, the $ra is set to the value 0x0040401C and the PC is set to 0x00402004. What is the address of the jal instruction?
14. If there are no stalls in the 5-stage pipelined CPU, what is the CPI for a large program?
15. What is the value in memory at address 0x10010008 after the following? Give your answer in hexadecimal.
.data
.word 5 #addr 0x10010000
.word 6
.word 3 .text
lui $t3, 0x1001 lw $t1, 0($t3) lw $t2, 4($t3) add $t1, $t1, $t2 sw $t1, 8($t3)
16. Assuming negligible delays except: memory (300ps), ALU and adders(100ps), register file access (50ps). Instruction and data memory and register read/write are counted separately. What is the clock cycle time for the pipelined processor?
17. The following instructions are located in memory starting at address 0x00400000. The PC contains the value 0x00400000. What are the values in the PC and IR after the second instruction is fetched?
addi $t0, $0, 5 addi $t0, $t0, 4
18. Assuming negligible delays except: memory (300ps), ALU and adders(100ps), register file access (50ps). Instruction and data memory and register read/write are separate. What is the clock cycle time for the single cycle processor?
19. Assume the function “final” has been written to calculate a = b + a / 2; There are two arguments for the function:
• $a0 must hold the address of a • $a1 must hold the value of b
If a is stored in address 0x10010000 and b is stored in address 0x10010004, what are the correct instructions to load the parameters and call the function?
20. The number 10.5 is stored in the IEEE single-precision standard format. What is the value of the exponent field (in binary)?
21. Assuming the 5 cycle pipeline, how many stalls are needed in the following if the branch IS taken? Assume both jumps and branches are determined in the ID stage.
lw $3, 8($7) add $3, $3, $3 j start
start: add $2, $1, $5
beq $3, $0, target add $1, $2, $3
target:or $1, $2, $3
22. What does the dirty bit in a block in cache indicate?
23. If a fully associative cache holds 4 blocks, which is the first block number to be removed if the LRU (least recently used) is used?
3, 4, 1, 3, 1, 3, 2, 5, 4
24. The following MIPS data segment starts at 0x10010000. What is the value of the label “data2”? Give your answer in hexadecimal.
.data
data1: .word 5, 8, 2 data2: .word 4, 6, 7
25. A program takes 15 seconds to execute. There are 1010 instructions with a CPI of 1.5. What is the clock cycle time?
26. How is the constant in an instruction used during the execution of the pc-relative addressing mode in MIPS?
27. The program counter (PC) always holds what value?
28. What are the values in hi and lo after the following is executed? Label your answer with the name of the registers.
ori $t0, $0, 2 addi $t1, $0, 7 div $t1, $t0
29. The following instruction is located at 0x00400010. What is the value for the PC written to the EX/MEM register? Give your answer in hexadecimal.
lw $t1, 4($t2)
30. What is the difference between a compiler and an assembler?