COMP 2421 Computer Organization Homework 2
Deadline: 11:59 pm, Apr. 18 (Monday), 2022.
PROBLEM 1 [15 PTS]
Suppose in a computer storage system, the basic addressable unit is one Byte (i.e., 1 word = 1 Byte). The size of themainmemoryis1MB(1MB=210 KB;1KB=210 Bytes)andeachblockinmainmemoryhasasizeof16 Bytes. The size of the Cache is 64 KB.
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Answer the following questions:
(1) <3 pts> Assume direct mapping. Given a memory address A004B in hexadecimal format, write the values of its tag, line, word fields in binary format, respectively. Explain your answer.
(2) <2 pts> Assume direct mapping. Give any two memory addresses with different tag values that would be mapped to the same Cache line. Note, write the addresses in hexadecimal format.
(3) <3 pts> Assume direct mapping. Suppose for a specific line in the cache, we found that this line current stores a byte with address 0100 0001 0011 1110 0000. What are the addresses of the other bytes that are currently stored in this line along with that byte?
(4) <2 pts> Assume associative mapping. Given a memory address A004B in hexadecimal format, write the values of its tag and word fields in binary format, respectively.
(5) <5 pts>Suppose that the processor needs to access a byte with address F001A and assume that this byte is currently stored in the Cache. Explain the processes of locating this byte in Cache using direct mapping and associative mapping, respectively. What¡¯s the major difference?
PROBLEM 2 [10 PTS]
(1) Consider a general error correction code which can correct 1 error (we assume that at most one error could occur). This error correction code contains M data bits and K parity bits. The redundancy of this code is calculated as MK . Recall the relation between M and K and find the minimum value of K for these three cases:(1)M =4;(2)M =20;(3)M =32.<3pts>
Consider the above three cases, what¡¯s the trend of redundancy as we increase M? What¡¯s the risk of
increasing M? <2 pts>
(2) Consider an error correction code with M = 2 and K = 3. The encoding scheme is as follows:
Data bits (M = 2 bits) 00
is encoded as
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Codeword (M + K = 5 bits) 00000
What¡¯s the minimum hamming distance dmin between every two codewords?<1 pts>
Can this code correct one error? Explain your answer (if not, give a counter example). <4 pts>
PROBLEM 3 [5 PTS]
Consider a processor with two configurations of cache. In the first configuration, the processor uses a cache of 32KB, obtaining a 95% hit rate, 2 ns hit time and an 18 ns miss penalty. In the second configuration, the cache has a size of 64KB, resulting in a hit rate of 97%, a hit time of 3 ns and the same miss penalty as in the previous case. Explain why a larger cache can increase the hit rate? <1 pts>
Compute the average access time for both configurations. <4 pts>
PROBLEM 4 [20 PTS]
Answer the following short questions:
(1) <2 pts> Why is main memory not suitable for permanent program storage or backup purposes?
(2) <3 pts> What are the three basic components in a computer system taught in this course?
(3) <2 pts> Why are I/O modules needed in a computer system? Give two reasons.
(4) <3 pts> What¡¯s the main difference between programmed I/O and interrupt-driven I/O?
(5) <3 pts> What¡¯s the main difference between Memory-mapped I/O and Isolated I/O?
(6) <3 pts> In Constant Angular Velocity magnetic disk, what is done to ensure constant data rate for writ-
ing/reading?
(7) <2 pts> Explain the seek time and rotational delay for magnetic disk.
(8) <2 pts> Why can RAID increase the reliability of storage?
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