Embedded Systems with ARM Cortex-M Microcontrollers in Assembly Language and C (Dr. )
Chapter 6 Flow Control in Assembly
ECE3375B: Microprocessors and Microcomputers Electrical and Computer Engineering Western University
Dr. Leod (Section 1, Dr. (Section 2,
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Three Control Structures
Sequence Structure
Computer executes statements (instructions), one after another, in the order listed in the program
Sequence Structure
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 6
ECE 3375b (A.Reyhani)
Three Control Structures
Selection Structure If-then-else
Loop Structure while loop
for loop
Sequence Structure
Selection Structure
Loop Structure
ECE 3375b (A.Reyhani)
3 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 6
Review: Condition Flags
Program Status Register (PSR)
ISR number
Negative bit
N = 1 if most significant bit of result is 1
Zero bit
Z=1 ifallbitsofresultare0
Carry bit
For unsigned addition, C = 1 if carry takes place
For unsigned subtraction, C = 0 (carry = not borrow) if borrow takes place For shift/rotation, C = last bit shifted out
oVerflow bit
V = 1 if adding 2 same-signed numbers produces a result with the opposite sign
Positive + Positive = Negative, or
Negative + negative = Positive
Non-arithmetic operations does not touch V bit, such as MOV,AND,LSL,MUL
4 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 6
ECE 3375b (A.Reyhani)
Updating Condition Flags
Method1: appendwith“S”
ADD r0,r1,r2 → ADDS r0,r1,r2 SUB r0,r1,r2 → SUBS r0,r1,r2
Method 2: using compare instructions
Instruction Brief description Flags
Compare N, Z, C, V
CompareNegative N,Z,C,V
Test Equivalence N,Z,C
Test N,Z,C
5 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 6
ECE 3375b (A.Reyhani)
Updating Condition Flags
Instruction Operands
Brief description Flags
Compare N, Z, C, V
Rn,Op2 CompareNegative N,Z,C,V
Test Equivalence N,Z,C
Rn, Op2 Test N,Z,C
➢ Update the status flags
• No need to add S bit.
• No need to specify destination register.
➢ Operations are:
• CMP operand1 – operand2, but result not written
• CMN operand1 + operand2, but result not written
• TST operand1 & operand2, but result not written
• TEQ operand1 ^ operand2, but result not written
➢ Examples:
• CMP r0, r1
• TST r2, #5
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 6
ECE 3375b (A.Reyhani)
Updating Condition Flags: CMP and CMN
CMP Rn, Operand2
CMN Rn, Operand2
Update N, Z, C and V according to the result CMP subtracts Operand2 from Rn.
Same as SUBS, except result is discarded. CMN adds Operand2 to Rn.
Same as ADDS, except result is discarded.
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 6
ECE 3375b (A.Reyhani)
Example of CMP
Area absolute, CODE, READONLY
EXPORT __main
__main PROC
CMP r1, #0
RSBLT r0, r1, #0 done B done ; deadloop
Note: RSB = Reverse SuBtract
8 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 6 ECE 3375b (A.Reyhani)
Updating Condition Flags: TST and TEQ
TST Rn, Operand2 ; Bitwise AND
TEQ Rn, Operand2 ; Bitwise Exclusive OR
Update N and Z according to the result
Can update C during the calculation of Operand2
Do not affect V
TST performs bitwise AND on Rn and Operand2. Same as ANDS, except result is discarded.
TEQ performs bitwise Exclusive OR on Rn and Operand2. Same as EORS, except result is discarded.
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 6
ECE 3375b (A.Reyhani)
Unconditional Branch Instructions
Instruction
Operands Brief description
Branch with Link
Branch indirect with Link
Branch indirect
cause a branch to label.
BL label
copy the address of the next instruction into r14 (lr, the link register), and cause a branch to label.
branch to the address held in Rm
copy the address of the next instruction into r14 (lr, the link register) and branch to the address held in Rm
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 6
ECE 3375b (A.Reyhani)
Unconditional Branch Instructions: A Simple Example
MOVS r1, #1
B target ; Branch to target MOVS r2, #2 ; Not executed MOVS r3, #3 ; Not executed MOVS r4, #4 ; Not executed
target MOVS r5, #5
A label marks the location of an instruction
Labels helps human to read the code
In machine program, labels are converted to numeric offsets by assembler
11 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 6 ECE 3375b (A.Reyhani)
Condition Codes
Description
Flags tested
Unsigned Higher or Same
Unsigned LOwer
MInus (Negative)
PLus (Positive or Zero)
oVerflow Set
oVerflow Clear
Unsigned HIgher
Unsigned Lower or Same
Signed Greater or Equal
Signed Less Than
Signed Greater Than
Signed Less than or Equal
Note AL is the default and does not need to be specified
12 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 6 ECE 3375b (A.Reyhani)
Condition Codes
The possible condition codes are listed below:
Description
Flags tested
Unsigned Higher or Same
Unsigned LOwer
MInus (Negative)
PLus (Positive or Zero)
oVerflow Set
oVerflow Clear
Unsigned HIgher
C==1 and Z==0
Unsigned Lower or Same
C==0 or Z==1
Signed Greater or Equal
Signed Less Than
Signed Greater Than
Z==0 and N==V
Signed Less than or Equal
Z==1 or N!=V
Note AL is the default and does not need to be specified
13 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 6 ECE 3375b (A.Reyhani)
Signed Greater or Equal (N == V) CMP r0, r1
perform subtraction r0 – r1, without saving the result
• No overflow, implying the result is correct.
• The result is non-negative,
• Thus r0 – r1 ≥ 0, i.e., r0 ≥ r1
• No overflow, implying the result is correct.
• The result is negative.
• Thusr0–r1<0,i.e.,r0
19 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 6
ECE 3375b (A.Reyhani)
Which is Greater: 0xFFFFFFFF or 0x00000001? It’s software’s responsibility to tell computer how to interpret data:
If written in C, declare the signed vs unsigned variable
If written in Assembly, use signed vs unsigned branch instructions
MOVS r5, #0xFFFFFFFF MOVS r6, #0x00000001 CMP r5, r6
BLE Then_Clause …
signed int x, y ; x = -1;
if (x > y)
BLE: Branch if less than or equal, signed ≤
MOVS r5, #0xFFFFFFFF MOVS r6, #0x00000001 CMP r5, r6
BLS Then_Clause
unsigned int x, y ; x = 4294967295;
if (x > y)
BLS: Branch if lower or same, unsigned ≤
20 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 6
ECE 3375b (A.Reyhani)
If-then Statement
Implementation 1:
// a is signed integer
if (a < 0 ) {
a = 0 – a;
x = x + 1;
; r1 = a (signed integer), r2 = x
CMP r1, #0
then RSB r1, r1, #0
; Compare a with 0
; Go to endif if a ≥ 0
; reverse subtract, a = 0 - a
endif ADDr2,r2,#1 ;x=x+1
21 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 6 ECE 3375b (A.Reyhani)
If-then Statement
Implementation 2:
// a is signed integer
if (a < 0 ) {
a = 0 – a;
x = x + 1;
; r1 = a, r2 = x
CMP r1, #0 ; Compare a with 0 RSBLTr1,r1,#0 ;a=0-aifa<0 ADD r2, r2, #1 ; x = x + 1
22 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 6 ECE 3375b (A.Reyhani)
Compound Boolean Expression
x > 20 && x < 25
x == 20 || x == 25
!(x == 20 || x == 25)
Assembly Program
// x is a signed integer
if(x <= 20 || x >= 25){ a=1
CMP r0, #20
CMP r0, #25
; compare x and 20 ;gotothenifx≤20 ; compare x and 25 ;gotoendififx<25
then MOV r1,#1 ;a=1 endif
23 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 6
ECE 3375b (A.Reyhani)
If-then-else
if (a == 1)
; r1 = a, r2 = b
CMP r1, #1
BNEelse then MOVr2,#3
; compare a and 1 ;gotoelseifa≠1 ;b=3
; go to endif
else MOVr2,#4 ;b=4
24 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 6 ECE 3375b (A.Reyhani)
int sum = 0;
for(i = 0; i < 10; i++){
sum += i; }
Implementation 1:
MOVr0,#0 ;i MOVr1,#0 ;sum
loop ADDr1,r1,r0 ;sum+=i ADDr0,r0,#1 ;i++
check CMP r0, #10 ; check whether i < 10 BLT loop ; loop if signed less than
25 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 6 ECE 3375b (A.Reyhani)
int sum = 0;
for(i = 0; i < 10; i++){
sum += i; }
Implementation 2:
MOVr0,#0 ;i MOVr1,#0 ;sum
loop CMP r0, #10 ; check whether i < 10 BGE endloop ; skip if ≥
ADDr1,r1,r0 ;sum+=i ADD r0, r0, #1 ; i++
26 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 6 ECE 3375b (A.Reyhani)
Combined Program Status Registers (xPSR)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7
Interrupt/Exception Number
Thumb state flag
Stick saturation flag for SSAT and USAT
Overflow flag
Carry/Borrow flag
Negative or less than flag
IT[7:0]: If-Then bits
Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 6
ECE 3375b (A.Reyhani)
Condition Codes
The possible condition codes are listed below:
Description
Flags tested
Unsigned higher or same
Unsigned lower
Positive or Zero
No overflow
Unsigned higher
Unsigned lower or same
C=0 or Z=1
Signed Greater or equal
Signed Less than
Signed Greater than
Signed Less than or equal
Z=1 or N!=V
Note AL is the default and does not need to be specified
28 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 6 ECE 3375b (A.Reyhani)
Conditional Execution
Add instruction
Flag tested
ADDEQ r3, r2, r1
Add if EQual
Add if Z = 1
ADDNE r3, r2, r1
Add if Not Equal
Add if Z = 0
ADDHS r3, r2, r1
Add if Unsigned Higher or Same
Add if C = 1
ADDLO r3, r2, r1
Add if Unsigned LOwer
Add if C = 0
ADDMI r3, r2, r1
Add if Minus (Negative)
Add if N = 1
ADDPL r3, r2, r1
Add if PLus (Positive or Zero)
Add if N = 0
ADDVS r3, r2, r1
Add if oVerflow Set
Add if V = 1
ADDVC r3, r2, r1
Add if oVerflow Clear
Add if V = 0
ADDHI r3, r2, r1
Add if Unsigned HIgher
Add if C = 1 & Z = 0
ADDLS r3, r2, r1
Add if Unsigned Lower or Same
Add if C = 0 or Z = 1
ADDGE r3, r2, r1
Add if Signed Greater or Equal
Add if N = V
ADDLT r3, r2, r1
Add if Signed Less Than
Add if N != V
ADDGT r3, r2, r1
Add if Signed Greater Than
Add if Z = 0 & N = V
ADDLE r3, r2, r1
Add if Signed Less than or Equal
Add if Z = 1 or N = !V
29 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 6 ECE 3375b (A.Reyhani)
Conditional Execution
a ⟶ r0 y ⟶ r1
if (a <= 0)
CMP r0, #0
MOVLE r1, #-1 ; executed if LE MOVGT r1, #1 ; executed if GT
30 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 6
ECE 3375b (A.Reyhani)
LE: Signed Less than or Equal GT: Signed Greater Than
Conditional Execution
a ⟶ r0 y ⟶ r1
CMP r0, #1
CMPNE r0, #7 ; executed if r0 != 1 CMPNE r0, #11 ; executed if r0 != 7 MOVEQ r1, #1
MOVNE r1, #-1
if (a==1 || a==7 || a==11) y = 1;
NE: Not Equal EQ: Equal
31 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 6
ECE 3375b (A.Reyhani)
Compound Boolean Expression
Assembly Program
// x is a signed integer
if(x <= 20 || x >= 25){
; r0 = x, r1 = a
CMP r0, #20 ; compare x and 20
MOVLE r1, #1 ; a=1 if less or equal CMP r0, #25 ; CMP if greater than MOVGE r1, #1 ; a=1 if greater or equal
32 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 6 ECE 3375b (A.Reyhani)
Example 1: Greatest Common Divider (GCD)
Euclid’s Algorithm
uint32_t a, b; while (a != b ) {
if (a > b)
a = a – b;
b = b – a;
; suppose r0 = a and r1 = b gcd CMPr0,r1 ;a>b?
SUB r0, r0, r1
; if a = b, done
; a = a – b
less SUBr1,r1,r0 ;b=b–a B gcd
33 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 6 ECE 3375b (A.Reyhani)
gcd CMP r0, r1
SUBHI r0, r0, r1
SUBLO r1, r1, r0 BNE gcd
// x in r0, y in r1
if ( x + y < 0 ) x = 0;
ADDS r0, r0, r1
BPL PosOrZ
MOV r0, #0
PosOrZ MOV r0, #1 done
ADDS r0,r0,r1 ; r0=x+y, settingCCs MOVMI r0,#0 ; return0ifnbit=1 MOVPL r0,#1 ; return1ifnbit=0
34 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 6 ECE 3375b (A.Reyhani)
Summary: Condition Codes
Description
Flags tested
Unsigned Higher or Same
Unsigned LOwer
MInus (Negative)
PLus (Positive or Zero)
oVerflow Set
oVerflow Cleared
Unsigned HIgher
Unsigned Lower or Same
C=0 or Z=1
Signed Greater or Equal
Signed Less Than
Signed Greater Than
Signed Less than or Equal
Z=1 or N!=V
Note AL is the default and does not need to be specified
35 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 6 ECE 3375b (A.Reyhani)
Branch Instructions
Instruction
Description
Flags tested
Unconditional Branch
Branch to label
Conditional Branch
Branch if EQual
Branch if Not Equal
BCS/BHS label
Branch if unsigned Higher or Same
BCC/BLO label
Branch if unsigned LOwer
Branch if MInus (Negative)
Branch if PLus (Positive or Zero)
Branch if oVerflow Set
Branch if oVerflow Clear
Branch if unsigned HIgher
Branch if unsigned Lower or Same
C = 0 or Z = 1
Branch if signed Greater or Equal
Branch if signed Less Than
Branch if signed Greater Than
Branch if signed Less than or Equal
Z = 1 or N = !V
36 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 6 ECE 3375b (A.Reyhani)
Summary: Conditionally Executed
Add instruction
Flag tested
ADDEQ r3, r2, r1
Add if EQual
Add if Z = 1
ADDNE r3, r2, r1
Add if Not Equal
Add if Z = 0
ADDHS r3, r2, r1
Add if Unsigned Higher or Same
Add if C = 1
ADDLO r3, r2, r1
Add if Unsigned LOwer
Add if C = 0
ADDMI r3, r2, r1
Add if Minus (Negative)
Add if N = 1
ADDPL r3, r2, r1
Add if PLus (Positive or Zero)
Add if N = 0
ADDVS r3, r2, r1
Add if oVerflow Set
Add if V = 1
ADDVC r3, r2, r1
Add if oVerflow Clear
Add if V = 0
ADDHI r3, r2, r1
Add if Unsigned HIgher
Add if C = 1 & Z = 0
ADDLS r3, r2, r1
Add if Unsigned Lower or Same
Add if C = 0 or Z = 1
ADDGE r3, r2, r1
Add if Signed Greater or Equal
Add if N = V
ADDLT r3, r2, r1
Add if Signed Less Than
Add if N != V
ADDGT r3, r2, r1
Add if Signed Greater Than
Add if Z = 0 & N = V
ADDLE r3, r2, r1
Add if Signed Less than or Equal
Add if Z = 1 or N = !V
37 Embedded Systems with ARM Cortex-M Microcontrollers (Dr. Y. Zhu): Chapter 6 ECE 3375b (A.Reyhani)
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