程序代写代做代考 mips assembly UCCD1133

UCCD1133
Introduction to Computer Organisation and Architecture
Chapter 4-3 Addressing Modes

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Addressing Modes
• What is addressing mode?
• Addressing modes are the ways of specifying an operand or a memory
address.
• The address of the operand determined is called the effective address.
• Basic MIPS addressing modes:
• Register addressing
• Immediate addressing
• Base (displacement) addressing • PC-Relative addressing
• Pseudo-direct addressing
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Register addressing
• The operand is in a register.
• Example: add $s0, $t2, $t3 • Example: sub $t8, $s1, $0
❑ Used by instructions:
Arithmetic instructions: add, sub, … Logical instructions: and, or, sll, srl, … Program control instructions: slt, sltu, jr, …
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Immediate Addressing
• The operand is a 16-bit constant contained within the instruction. • Example: ori $t3, $t7, 0x00FF
• Used by instructions:
• Arithmetic and logical instructions: addi, andi, ori, … • Data transfer instructions: lui
• Program control instructions: slti, sltiu, …
• Zero-extending 16-bit – logical immediate instructions (andi, ori, etc.)
• Sign-extending 16 bit – arithmetic and program control immediate instructions (addi, addiu, slti, sltiu, etc)
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Base (displacement) addressing
• The operand’s memory address = base address + sign-extended immediate
• Example: lw $s4, 72($0)
• address = $0 + 72
• Example: sw $t2, -24($t1) • address=$t1–24
• Used by instructions:
• Data transfer instructions: lw, sw, lb, sb, …
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PC-Relative Addressing
• The new instruction’s memory address is obtained by summing the PC and a 16-bit constant contained within the current instruction.
• Used by instructions:
• Branch instructions: beq, bne
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PC-Relative Addressing
• The new instruction’s memory address is obtained by summing the PC and a 16-bit constant contained within the current instruction.
– Example:
0x10
0x14
0x18
0x1C
0x20 else: 0x24
Assembly Code
beq $t0, $0, else
(beq $t0, $0, 3)
beq $t0, $0, else addi $v0, $0, 1 addi $sp, $sp, i jr $ra
addi $a0, $a0, -1 jal factorial
Field Values
op rs rt imm
6 bits 5 bits 5 bits 5 bits 5 bits 6 bits
4
8
0
3
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Pseudo-direct Addressing
• The new instruction’s address (jump target address) in memory is obtained by concatenating the left-shifted 26-bit constant contained within the current instruction with the upper 4-bits of the PC.
• Used by instructions:
• Jump instructions: j, jal.
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Pseudo-direct Addressing
• The new instruction’s address (jump target address) in memory is obtained by concatenating the left-shifted 26-bit constant contained within the current instruction with the upper 4-bits of the PC.
– Example:
0x0040005C jal sum

0x004000A0 sum: add $v0, $a0, $a1
JTA 0000 0000 0100 0000 0000 0000 1010 0000
(0x004000A0) (0x0100028)
26-bit addr
0000 0000 0100 0000 0000 0000 1010 0000 0100028
op
6 bits
Field Values
imm 26 bits
op
6 bits
Machine Code
addr 26 bits
(0x0C100028)
3
0x0100028
000011
00 0001 0000 0000 0000 0010 1000
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MIPS Memory Map
• What is stored in memory?
• Instructions (also called text)
• Data
• Global/static:allocatedbeforeprogrambegins • Dynamic:allocatedwithinprogram
• How big is memory?
• At most 232 = 4 gigabytes (4 GB)
• From address 0x00000000 to 0xFFFFFFFF
Address 0xFFFFFFFC
0x80000000 0x7FFFFFFC
0x10010000 0x1000FFFC
0x10000000 0x0FFFFFFC
0x00400000 0x003FFFFC
0x00000000
Segment
Reserved
Stack
Dynamic Data Heap
Static Data
Text
Reserved
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