Thursday 21 May 2020, 14:00 BST
(24 hour open online assessment – Indicative duration 2 hours)
DEGREES of MSc in Information Technology, Software Development and IT Cyber Security
System and Networks (IT) COMPSCI 4043
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Answer ALL 3 Questions
This examination paper is worth a total of 60 marks
Express the following in 16-bit two’s complement code, giving your answers in hexadecimal. Show your working.
(b) Give the range of values that can be represented by a 32-bit two’s complement code (express the range using powers of 2) and explain why.
(c) Find two 8-bit codewords, X and Y, such that X+Y overflows if the code being used is unsigned but does not if it is two’s complement. Now find two codewords, W and Z, such that W+Z overflows in both codes. Explain your reasoning carefully.
(d) Write a Sigma16 program that takes an n-element array, X, of unsigned numbers and subtracts 1 from each element, except when the element is already 0. Assume that n is an unsigned variable in data memory indicating the number of elements in the array. Fully comment your code.
(e) Referring to your solution for (d), discuss what maximum value of n it would work for, explaining what factors you are considering.
For reference, here is part of the instruction set of the Sigma16 CPU.
lea load store add sub mul div and inv
xor cmplt cmpeq cmpgt shiftl shiftr jumpf jumpt jal trap jump
Rd, x[Ra] Rd, x[Ra] Rd, x[Ra] Rd,Ra,Rb Rd,Ra,Rb Rd,Ra,Rb Rd,Ra,Rb Rd,Ra,Rb Rd,Ra,Rb Rd,Ra,Rb Rd,Ra,Rb Rd,Ra,Rb Rd,Ra,Rb Rd,Ra,Rb Rd,Ra,Rb Rd,Ra,Rb Rd, x[Ra] Rd, x[Ra] Rd, x[Ra] Rd,Ra,Rb x[Ra]
Rd:= x +Ra
Rd:= mem[x +Ra]
mem[x +Ra]:=Rd
Rd:= Ra+Rb
Rd:= Ra-Rb
Rd:= Ra*Rb
Rd:= Ra/Rb, R15:=Ra mod Rb
Rd:= Ra AND Rb
Rd:= NOT Ra
Rd:= Ra OR Rb
Rd:= Ra XOR Rb
Rd:= Ra
Rd:=Ra logic shifted left Rb places Rd:=Ra logic shifted right Rb places If Rd=0 then PC:=x+Ra
If Rd<>0 then PC:=x+Ra
Rd:= pc, pc: =x +Ra
PC:= interrupt handler
PC:= x +Ra
CONTINUED OVERLEAF
Distinguish between primary and secondary memory and explain briefly how the CPU accesses data stored in each. If a user were experiencing problems with the performance of a PC running a modern operating system using virtual memory, under what circumstances would you recommend increasing the amount of primary memory? Explain your reasoning.
(b) The following Sigma 16 code is intended to take an 8-element array (only first element is shown) and add all the elements placing the result in another variable, sum. However, although the code will assemble, it contains several errors.
i. Draw up a register-use table for the program (suitable for inclusion as comment).
ii. Identify the errors, in each case explain what is wrong, and how you would correct it.
iii. Write out the corrected program.
LEA R1,1[R0] ADD R2,R0,R0 LEA R3,n[R0] ADD R4,R0,R0
;Set R1 to constant 1 ;i:=0
;if yes, exit
;load x[i] ;sum:=sum + x[i] ;i:=i+1
FORLOOP CMPEQ
JUMPF R5,OUT[R0]
LOAD R6,X[R0]
ADD R4,R4,R1 ADD R1,R2,R2 JUMP FORLOOP[R0]
TRAP R0,R0,R0
; Data Area
n DATA sum DATA x DATA
R4,sum[R0]
(c) Estimate how many cycles the corrected program would take to run.
(d) In the corrected program estimate the advantage a system with a cache memory would gain if a primary memory cycle takes 10ns and a cache cycle 1ns.
CONTINUED OVERLEAF Page 2
In Internet communications, what is the function of an IP packet and how does the internetwork get such a packet to its intended destination.
(d) When new data arrives at such an interface, the device interrupts the CPU. Explain why and how this happens and, when it does, how the CPU will react. In your answer refer to the notion of an interrupt handler routine and say what, if you were to program such a routine, you would have it do (only a high-level informal description is required, not code).
(b) An IP interface has the address 10.100.20.6. What binary value does this address represent? Also write the value in hex. Show your working.
(c) A network interface is implemented as a memory-mapped Input/output device. What does this mean and what characteristics would a memory-mapped network interface require?
END OF EXAMINATION PAPER Page 3
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