SOF108 COMPUTER ARCHITECTURE TUTORIAL 6: Instruction Set Architecture – II
1. The following problems deal with translating from C to MIPS. Assume that the variables g, h, i, and j are given and could be considered 32-bit integers as declared in a C program:
f = g + (h – 5)
For the C statements above, what is the corresponding MIPS assembly code? Use a minimal number of MIPS assembly instructions.
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sub f, g, h
addi f, h, -5 add f,g,f
2. Write the MIPS instructions for the following C program.
# $s0 = i, $s1 = sum
addi $s1, $0, 0
add $s0, $0, $0
addi $t0, $0, 10
for: beq $s0, $t0, done
add $s1, $s1, $s0
addi $s0, $s0, 1
j for done:
#If i=10 go to done #sum=sum+i
In the snippet of MIPS assembler code below, how many times is instruction memory accessed? How many times is data memory accessed? (Count only accesses to memory for each individual instruction, not registers.)
lw $t0, 0($t1)
addi $t0, $t0, 1 sw $t1, 0($t1) addi $t0, $t0, 1 Answer:
The instruction memory is accessed four times (as there are four instructions), and the data memory is accessed twice (once for the lw instruction and the other for the sw instruction).
Use the register and memory values in the table below for the next questions. Assume a 32-bit machine with addressing modes as discussed in H&P. Assume each of the following questions starts from the table values; that is, DO NOT use value changes from one question as propagating into future parts of the question.
Give the values of R1, R2, and R3 after this instruction: add R3, R2, R1 What values will be in R1 and R3 after this instruction is executed:
load R3, 12(R1)
What values will be in the registers after this instruction is executed:
addi R2, R3, 16
i. 12+16=28=>atend:R1=12,R2=16,R3=28
ii. Address to load from = 12 + 12 = 24. Value in mem location 24 = 28. So at end:
R1=12 still and R3=28
iii. 20 + 16 = 36. So at end of instruction: R3=20, R2=36
Decode the following MIPS instructions (explain in English what are the effects of these instructions to the least significant 16 bits of $t2).
ori $t0, $zero, 0xFF2B
and $t2, $t2, $t0
After the first instruction. $t0 contains 0xFF2B. This is equivalent to:
1111 1111 0010 1011
That is, in location 2, 4, 6, and 7 we have a zero, and when doing an AND operation with the contents of $t0 will set the corresponding bits of the output to zero.
So, this will clear/ turn off bits 2, 4, 6, and 7 of register $t2.
ori $t2, $t2, 0x00E9
0x00E9 is equivalent to binary representation of: 0000 0000 1110 1001
That is, in location 0, 3, 5, 6, and 7 we have a one, and when doing an OR operation with this, the resultant value will have these corresponding bits of the output set to one. So, this will set/ turn on bits 0, 3, 5, 6, and 7 of register $t2.
xori $t2, $t2, 0x85
0x0085 is equivalent to binary representation of: 0000 0000 1000 0101
That is, in location 0, 2, and 7 we have a one, and when doing an XOR operation with this, the resultant value will have these corresponding bits flipped/complemented in the output.
So, this will flip bits 0, 2, and 7 of register $t2.
6. What’s wrong with the following picture? Correct the corresponding MIPS code.
7. Write the MIPS code segment for the following snippet of C program.
8. Write the MIPS code segment for the following snippet of C program.
9. Write the MIPS code segment for the following snippet of C program.
You can use the following branch instruction to translate the code: bge $t0,$t1,target # branch to target if $t0 >= $t1.
For your reference, a list of additional branch instructions and their description is included in the following table:
Branch Instruction
blt $t0,$t1,target ble $t0,$t1,target bgt $t0,$t1,target bge $t0,$t1,target
# branch to target if $t0 < $t1 # branch to target if $t0 <= $t1 # branch to target if $t0 > $t1 # branch to target if $t0 >= $t1
10. Look at registers $12 and $13 and memory (given below). Write the instruction that puts the value 0x00000004 into register $12.
Register $12 contains 0xFFFFFFFF
Register $13 contains 0x00040000
Complete the instruction below to put the value 0x00000004 into register $12.: lw$ , ($ )
lw $12, 0x0010($13) or
lw $12, 16($13)
The original value in $12 is irrelevant; it is replaced with a value from memory (memory remains unchanged).
11. Considering the contents of the memory location as described in the previous question, and the specified register location with the following contents:
Register $12 contains 0xFFFFFFFF
Register $13 contains 0x00040014
Complete the instruction below to put the word 0xFFFFFFFF into memory location 0x0004000C. It is OK to specify the 16-bit offset as a signed decimal integer.
sw$ , ($ )
sw $12, 0xFFF8($13) or
sw $12, -8($13)
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