Computer System Organization and Architecture Operating System Structures
& User Interface
Lecture Overview
In this lecture, we shall see:
uStorage Structure – Memory Hierarchy
u I/O Structure – How the I/O devices function? uI/O Mechanisms (Polling, Interrrupt Driven, DMA) u Some General System Architectures
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Storage Structure – Main Memory
u CPU can load instructions only from memory n Any programs to run must be stored there
uMemory is generally rewritable
n Main memory or (random-access memory)
n RAM is commonly implemented in a semiconductor technology called Dynamic RAM (DRAM)
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Storage Structure – Other forms of memory
uRead-only Memory (ROM) uElectrically Erasable Programmable
ROM (EEPROM)
uROM cannot be modified
n Suitable for bootstrap programs and game cartridges(!)
uEEPROM can only be changed infrequently
n Most smartphones store factory-bundled programs on EEPROM
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Storage Structure – How it works?
uMemory is an array of bytes
n Each byte has its own address
n Memory interaction via load/store instructions
u Load:
nMoves a byte from main memory to an internal
register within the CPU
u Store:
nWriting of a byte from CPU register to main memory
…
uCPU automatically loads instructions from main memory for execution
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Von Neumann architecture
uFetch instruction – store in instruction register
nThis is decoded, may cause further operands to be fetched and stored in another register
nInstruction is the executed – result stored back into memory
uMemory unit only sees a stream of addresses
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In the perfect world …
u Programs and data would reside in main memory nThis is difficult as the Main memory is small and volatile.
uSolution: Secondary storage which includes magnetic disks, optical disks, tapes.
nPrograms stored and loaded from here
n Many programs use the disk as both source and destination of
processing
uCache/CD-ROM/magnetic tapes other forms of storage system
n Differences lie in speed, cost, size and volatility
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Storage Comparison
Table of relative instances of memory and their associated speeds from Silberschatz et al (2012)
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Storage Hierarchy
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Storage Hierarchy – another view
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Faster, Expensive
Slower, Cheaper, more storage
I/O Structure
u Large portion of OS code dedicated to managing I/O uWhy is this important?
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How does I/O Work?
u Recall: hardware may trigger an interrupt at any time by sending a signal to the CPU.
u Devices interact via a device controller connected through a common bus to the CPU
uSmall Computer-Systems Interface (SCSI) controller
n Hardware (card or chip based) that allows SCSI storage device to communicate with the OS using an SCSI bus
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How does I/O Work?
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Device Controller
u Maintains some local buffer storage and a set of special- purpose registers
u Device controller moves the data between the peripheral devices that it controls and its local buffer storage
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Device Driver
uOperating systems have a device driver for each device controller. These are typically downloaded!
uThe device drivers understand the device controller and provides the rest of the OS with a uniform interface to the device. This is the same no matter the device.
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I/O Mechanisms
Three types of I/O mechanisms are possible: 1) Programmed I/O (also known as Polling) 2) Interrupt Driven I/O
3) Direct Memory Access (DMA)
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I/O Mechanisms – Programmed I/O
uProgrammed I/O requires the processor to “poll” the status of the I/O module (controller)
n Processor sends the I/O request to I/O module
n Processor checks, whether I/O module is finished?
n When I/O finished, data is transferred between I/O modules, processor and main memory.
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I/O Mechanisms – Programmed I/O
uProcessor has special instructions n Control I/O device
n Test status
n Transfer of data (read/write)
uPerformance Issues
n Processor is busy checking the I/O status of the I/O module
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I/O Mechanisms – Interrupt Driven I/O
n Interrupt driven I/O is fine for moving small amounts of data
n Not really suitable for bulk data movement, such as disk I/O
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I/O Mechanisms – Direct Memory Access
u DMA controller transfers data directly from the I/O
device to memory
n Buffers, pointers and counters for the I/O device are setup
n Device controller transfers an entire block of data directly to or
from its own buffer storage to memory.
u No intervention by the CPU during transfer
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Why DMA is preferable?
uOnly a single interrupt is generated
nMuch better that one interrupt per byte generated for low-
speed devices
u So, the CPU is freed up to do other, perhaps more interesting tasks!
u However, both DMA controller and processor share the bus connecting different hardware components.
nProcessor will experience slowdown of processing during DMA transfer, as it has to wait for getting access to the bus.
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Computer System Architecture
uSingle-Processor Systems
n One CPU – perhaps special purpose processors as well.
uMultiprocessor Systems (Parallel / Multicore) n Share bus, clock, memory and peripherals
n Servers → Smartphones
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Multiprocessor Systems – Advantages
uIncreased throughput
n N more processors != Speed-up ratio N (