Impress
CMPSC-F353
Architecture of Comp Systems
Data Representation, RTL
Register Transfer Language
Microoperation
The operations executed on data stored in registers(shift, clear, load, count)
Internal H/W Organization(best defined by specifying)
1. The set of registers
2. The sequence of microoperations
3. The control that initiates the sequence of microoperations
Register Transfer Language
The symbolic notation used to describe the microoperation transfer among registers
The use of symbols instead of a narrative explanation provides an organized and concise manner
A convenient tool for describing the internal organization of digital computers in concise and precise manner
Register Transfer
Registers
Designated by Capital Letter(sometimes followed by numerals) :
MAR(Memory Address Register), PC(Program Counter), IR(Instruction Register), R1(Processor Register)
The individual F/Fs in an n-bit register : numbered in sequence from 0(rightmost position) through n-1
The numbering of bits in a 16-bit register : marked on top of the box
A 16-bit register partitioned into two parts : bit 0-7(symbol “L” Low byte), bit 8-15(symbol “H” High byte)
15 8 7 0
PC(H) PC(L)
Information transfer from one register to another
e.g. transfer of the content of register R1 into register R2(note that R1 does not change after the transfer)
Control Function :
The transfer occurs only under a predetermined control condition
The transfer operation is executed by the hardware only if P=1 :
A comma is used to separate two or more operations (executed at the same time)
=
Register Transfer
Basic Symbols for Register Transfer:
Register Transfer
Common Bus
An efficient scheme for transferring information between registers in a multiple-register configuration
A bus structure = a set of common lines (one for each bit)
Control signals determine which register is selected
One way of constructing a common bus system is with multiplexers
The multiplexers select the source register whose binary information is placed on the bus
Bus and Memory Transfer
A bus system with four registers :
4-bit register X 4
Four 4 X 1 Multiplexers
For a system with k n-bit registers, what do we need?
n units of K x 1 MUXes
S1
S0
4-line
common
bus
Register D
Register C
Register B
Register A
Common Bus System
Bus Transfer
The content of register C is placed on the bus, and the content of the bus is loaded into register R1 by activating its load control input
Three-State Bus Buffers
A bus system can be constructed with three-state gates instead of multiplexers
Tri-State : 0, 1, High-impedance (Open circuit)
Common use is in buffer gate
=
R1 Register
C Register
n
Bus
Common Bus System
v/i
8
Three-state buffer gate :
When control input =1 :
Acts as normal buffer: The output is enabled(output Y = input A)
When control input =0 :
No matter what the input is, the output is disabled(output Y = high-impedance)
Normal input A
Control input C
If C=1, Output Y = A
If C=0, Output = High-impedance
Three-state Buffer Gate
The construction of a bus system with tri-state buffer:
The outputs of four buffers are connected together to form a single bus line(Three-state buffer)
No more than one buffer may be in the active state at any given time (2 X 4 Decoder)
To construct a common bus for 4 registers :
A0
B0
C0
D0
Select input
Enable input
Bus line for bit 0
Bus Line with Three-State Buffers
Complete the circuit for 4-bit registers.
Memory Transfer
Memory read : A transfer information into DR from the memory word M selected by the address in AR
Memory Write : A transfer information from R1 into the memory word M selected by the address in AR
AR: Address Reg.
DR: Data Reg.
M : Memory Word(Data)
Memory Transfer
HW feedback
Product-of-sums is not the complement of sum-of-products
Minimize the number of groups
Make sure you mark the correct square of the map for minterms
2’s complement arithmetic:
e.g. (-25) – (6)
1110 0111 (-25)
+ 1111 1010 (-6)
1110 0001 (-31)
Notes for Exam#1
What’s next?
HW3 is due Monday 9/30
Exam 1 is on Wednesday 10/2
Reading:
Chapter 4:
Section 4.1 to 4.5
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Sheet1
Symbol Description Examples
Letters(and numerals) Denotes a register MAR, R2
Parentheses ( ) Denotes a part of a register R2(0-7), R2(L)
Arrow <-- Denotes transfer of information R2 <-- R1
Comma , Separates two microoperations R2 <-- R1, R1 <-- R2
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Sheet1
S1 S0 Register selected
0 0 A
0 1 B
1 0 C
1 1 D
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