程序代写代做代考 mips Lectures for 2nd Edition

Lectures for 2nd Edition

Reading: 4.3
EEE 230
Single Cycle Datapath

MIPS implementations
A simplified version
Data path
Driven from needs of instructions subset
Overview
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Components of a Computer

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review
PC  instruction memory
Fetch
Register numbers  register file
read registers
Depending on instruction class
Use ALU to calculate
Arithmetic result
Memory address for load/store
Branch target address
Access data memory for load/store
PC  target address or PC + 4
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Morgan Kaufmann Publishers
3 June, 2016
Chapter 4 — The Processor
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Building a Datapath
Datapath
Elements that process data and addresses
in the CPU
Registers, ALUs, mux’s, memories, …
We will build a MIPS datapath incrementally
Refining the overview design

Instructions to be examined
r-format : add, sub, and, or, slt
i-format : lw, sw, beq
j-format : j

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Morgan Kaufmann Publishers
3 June, 2016
Chapter 4 — The Processor
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Break it down
fetch
execute

Each instruction must be fetched, decoded and executed
Hardware must exist for each operation

Fetch execute Cycle

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Instruction Fetch
32-bit register
Increment by 4 for next instruction

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Morgan Kaufmann Publishers
3 June, 2016
Chapter 4 — The Processor
7

R-Format Instructions
Read two register operands
Perform arithmetic/logical operation
Write register result
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Morgan Kaufmann Publishers
3 June, 2016
Chapter 4 — The Processor
8

Load/Store Instructions
Read register operands
Calculate address using 16-bit offset
Use ALU, but sign-extend offset
Load: Read memory and update register
Store: Write register value to memory
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Morgan Kaufmann Publishers
3 June, 2016
Chapter 4 — The Processor
9

Composing the Elements
First-cut data path does an instruction in one clock cycle
Each datapath element can only do one function at a time
Hence, we need separate instruction and data memories
Use multiplexers where alternate data sources are used for different instructions
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Morgan Kaufmann Publishers
3 June, 2016
Chapter 4 — The Processor
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Multiplexers

Can’t just join wires together
Use multiplexers
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Morgan Kaufmann Publishers
3 June, 2016
Chapter 4 — The Processor
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R-Type/Load/Store Datapath
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Morgan Kaufmann Publishers
3 June, 2016
Chapter 4 — The Processor
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Branch Instructions
Read register operands
Compare operands
Use ALU, subtract and check Zero output
Calculate target address
Sign-extend displacement
Shift left 2 places (word displacement)
Add to PC + 4
Already calculated by instruction fetch
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Morgan Kaufmann Publishers
3 June, 2016
Chapter 4 — The Processor
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Branch Instructions
Just
re-routes wires
Sign-bit wire replicated
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Morgan Kaufmann Publishers
3 June, 2016
Chapter 4 — The Processor
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Full Datapath
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Morgan Kaufmann Publishers
3 June, 2016
Chapter 4 — The Processor
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Datapath defines elements that process data and addresses
in the CPU
Registers, ALUs, mux’s, memories, …
Approach driven by requirements of instructions subset

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Summary

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