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Embedded Systems Design ELEN90066
Lecture 13 Microcontroller Internals David Jahshan
• D Flip Flop • Registers
• RAM
• MUX
• Counter
Quick rehash
D Flip Flop
• When rising edge of a clock (clk), the state of the input (D) is stored and made available on the output (Q) the inverse is also available (Q’)
DQ
Clk
Q’
Register
• An 8 bit register is 8 D Flip Flops in parallel with their clocks wired together.
8
Input Output 8
Clk
Multiplexer, Demultiplexer
• Multiplexertakesdataandachannelandoutput a signal. Demultiplexer does the opposite
DRAM
• CollectionofRegistersconnectedbymultiplexers
and de-multiplexers
CS
Row Select Column Select
Data
1
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Counter
• D Flip Flops in series AB
DQ
Clk
Q’
DQ
Clk
Q’
Microprocessor
• Instructions are stored in RAM, counter counts through the program (program counter), combination of AND, OR and NOT gates processes the instruction. DATA BUS
CONTROL SIGNAL
COUNTER
Program RAM
DATA RAM
ALU
Arithmetic Logic Unit
• Two data inputs – Operands
• Control input
– What to do with the
operand (ie add, subtract) • One data output
– Result Control • One status output
– Status register
Operand 1
Result
Operand 2
Status
ATMEGA16 Architecture
ATMEL ATMEGA16 Datasheet page 8
Let us run a small program
ldi r1, 0x19
; Load Immediate Register 1 25 ldi r2, 0x24
; Load Immediate Register 2 36 ;ADD Register 1 to Register 2 add r1, r2
• The program is stored in Flash Program memory
Execution of the program line 1
• Programcounterpointstoprogramaddresswith – ldi r1, 0x19
• Onrisingedgeofclock1,theinstructionis latched into the instruction register and the program counter is incremented
• Theinstructionisdecodedandthecontrolsignals are activated to do the following
– Output the value 0x19 onto the direct addressing line – Input enable register 1
– On clock 2 rising edge 0x19 is latched into register 1
2
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Execution of program line 2
• Programcounterpointstoprogramaddresswith – ldi r2, 0x25
• Onrisingedgeofclock2,theinstructionis latched into the instruction register and the program counter is incremented
• Theinstructionisdecodedandthecontrolsignals are activated to do the following
– Output the value 0x25 onto the direct addressing line
– Input enable register 2
• Onclock3risingedge0x25islatchedintoregister 2
Execution of program line 3
• Programcounterpointstoprogramaddresswith
– add r1, r2
• Onrisingedgeofclock3,theinstructionis latched into the instruction register and the program counter is incremented
• Theinstructionisdecodedandthecontrolsignals are activated to do the following
– Output the value from register 1 to input 1 of the ALU – Output the value from register 2 to input 2 of the ALU – The ALU instruction is set to ADD
– The input of register 1 is enabled
• Onclock4risingedgeoutputofALUislatched into register 1
What does the program look like
• If we look at the flash address we will see the following code:
1110 0001 0001 1001 1110 0010 0010 0101 0000 1100 0001 0010
• To work out what this means you refer to the AVR instruction set
• Time consuming, best done by compiler
Next Lecture
• IO port and how it works – Output
– Input
• Synchroniser
– Pull up resistor
• RAM access modes
• (or maybe PCB Assembly)
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