Impress
CMPSC-F353
Architecture of Comp Systems
Control Unit
The basic computer consists of the following hardware components:
A memory unit with 4096 words of 16bits
Nine registers : AR, PC, DR, AC, IR, TR, OUTR, INPR, and SC
Seven F/Fs : I, S, E, R, IEN, FGI, and FGO
Two decoders in control unit : 3 x 8 operation decoder, 4 x 16 timing decoder
A 16-bit common bus
Control Logic Gates : Control Output
Adder and Logic circuit connected to the AC input
Control Logic Gates
Signals to control the inputs of the nine registers
Signals to control the read and write inputs of memory
Signals to set, clear, or complement the F/Fs
Signals for S2 S1 S0 to select a register for the bus
Signals to control the AC adder and logic circuit
Design of Basic Computer
Basic Computer
Register Control : AR
Control inputs of AR : LD, INR, CLR
Find all the statements that change the AR
in Tab. 5-6
Control functions
Control of Registers and Memory
Memory Control : READ
Control inputs of Memory : READ, WRITE
Find all the statements that specify a read operation in Tab. 5-6
Control function
F/F Control : IEN
Control functions
Control of Registers and Memory
Encoder for Bus Selection :
S0 = x1 + x3 + x5 + x7
S1 = x2 + x3 + x6 + x7
S2 = x4 + x5 + x6 + x7
x1 = 1 :
Control Function :
x7 = 1 :
Same as Memory Read
Control Function :
Encoder
Multiplexer
Bus Select
Input
x1
x2
x3
x4
x5
x6
x7
S0
S1
S2
Bus Control
M..Morris Mano. 1993. Computer System Architecture (3rd ed.). Pearson, Page 163
Circuits associated with AC :
Fig. 5-21
Fig. 5-20
Fig. 2-11
Design of Accumulator Logic
Find the statement that change the AC :
LD
INR
CLR
Control of AC
Adder and Logic Circuit
Mano Machine
Fig. 5-4 : Common Bus(p.130)
Fig. 2-11 : Register(p. 59)
Fig. 5-6 : Control Unit(p. 137)
Fig. 5-16, 17,18 : Control Logic Gate(p.161- 163)
Fig. 5-20 : AC control(p.165)
Fig. 5-21 : Adder and Logic(p.166)
Integration !
Microprogrammed Control
Control Unit
Initiate sequences of microoperations
Control signal (that specify microoperations) in a bus-organized system
groups of bits that select the paths in multiplexers, decoders, and arithmetic logic units
Two major types of Control Unit
Hardwired Control : in Chap. 5
The control logic is implemented with gates, F/Fs, decoders, and other digital circuits
+ Fast operation, – Wiring change(if the design has to be modified)
Microprogrammed Control : in this Chapter
The control information is stored in a control memory, and the control memory is programmed to initiate the required sequence of microoperations
+ Any required change can be done by updating the microprogram in control memory, – Slow operation
Microprogrammed Control
Control Word
The control variables at any given time can be represented by a string of 1’s and 0’s.
Microprogrammed Control Unit
A control unit whose binary control variables are stored in memory (control memory).
Microinstruction : Each Control Word in Control Memory
The microinstruction specifies one or more microoperations
Microprogram
A sequence of microinstructions
Dynamic microprogramming : Control Memory = RAM
RAM can be used for writing (to change a writable control memory)
Static microprogramming : Control Memory = ROM
Control words in ROM are made permanent during the hardware production.
User Program
Machine Instruction
Microprogram
Microinstruction
Microoperation
1) Control Memory
A memory is part of a control unit : Microprogram
Computer Memory (employs a microprogrammed control unit)
Main Memory : for storing user program (Machine instruction/data)
Control Memory : for storing microprogram (Microinstruction)
2) Control Address Register
Specify the address of the microinstruction
Microprogrammed Control Organization
M..Morris Mano. 1993. Computer System Architecture (3rd ed.). Pearson, Page 214
3) Sequencer (= Next Address Generator)
Determine the address sequence that is read from control memory
Address of the next microinstruction can be specified in several ways depending on the sequencer input
4) Control Data Register (= Pipeline Register )
Hold the microinstruction read from control memory
RISC Architecture Concept
RISC(Reduced Instruction Set Computer) system use hardwired control rather than microprogrammed control : Sec. 8-8
Microprogrammed Control Organization
14
Address Sequencing = Sequencer : Next Address Generator
Selection of address for control memory
Routine
Microinstruction are stored in control memory in groups ( each group specifying a routine)
Mapping
Instruction Code Address in control memory(where the routine is)
Address Sequencing Capabilities : control memory address
1) Incrementing of the control address register
2) Unconditional branch or conditional branch, depending on status bit conditions
3) Mapping process
( bits of the instruction address for control memory )
4) A facility for subroutine return
Address Sequencing
Multiplexer
CAR Increment
JMP/CALL
Mapping
Subroutine Return
CAR : Control Address Register
CAR receive the address from
4 different paths
1) Incrementer
2) Branch address from
control memory
3) Mapping Logic
4) SBR : Subroutine Register
SBR : Subroutine Register
Return Address can not be stored
in ROM
Return Address for a subroutine is
stored in SBR
Selection of address for control memory
Conditional Branching
Status Bits
Control the conditional branch decisions generated in the Branch Logic
Branch Logic
Test the specified condition and Branch to the indicated address if the condition is met ; otherwise, the control address register is just incremented.
Mapping of Instruction :
1 0 1 1 Address
Opcode
Computer Instruction
Microinstruction Address
Mapping bits
0 1 0 1 1 0 0
0 x x x x 0 0
Conditional Branching
4 bit Opcode = specify up to 16 distinct operations
Mapping Process : Converts the 4-bit Opcode to a 7-bit control memory address
1) Place a “0” in the most significant bit of the address
2) Transfer 4-bit Operation code bits
3) Clear the two least significant bits of the CAR
Control Memory Size : 128 words (= 27)
Mapping of Instruction
1 0 1 1 Address
Opcode
Computer Instruction
Microinstruction Address
Mapping bits
0 1 0 1 1 0 0
0 x x x x 0 0
Subroutines are programs that are used by other routines
Subroutine can be called from any point within the main body of the microprogram
Microinstructions can be saved by subroutines that use common section of microcode
Subroutine must have a provision for
storing the return address during a subroutine call
restoring the address during a subroutine return
Subroutine
Microprogram Example
Computer Configuration :
2 Memory : Main memory(instruction/data), Control memory(microprogram)
Data written to memory come from DR, and Data read from memory can go only to DR
4 CPU Register and ALU : DR, AR, PC, AC, ALU
DR can receive information from AC, PC, or Memory (selected by MUX)
AR can receive information from PC or DR (selected by MUX)
PC can receive information only from AR
ALU performs microoperation with data from AC and DR
2 Control Unit Register : SBR, CAR
Microprogram Example
Computer Configuration:
Transfer among registers is done through multiplexers
Microprogram Example
M..Morris Mano. 1993. Computer System Architecture (3rd ed.). Pearson, Page 221
Instruction format
16 possible memory-reference instructions
For simplicity of example just consider 4 instructions
Microprogram Example
M..Morris Mano. 1993. Computer System Architecture (3rd ed.). Pearson, Page 222
Microinstruction code format:
The fields F1, F2, F3 specify microoperations
The CD field selects status bit conditions
The BR field specifies the type of branch to be used
The AD field contains the branch address
No more than 3 microoperations can be chosen for a microinstruction, one from each field.
Microprogram Example
M..Morris Mano. 1993. Computer System Architecture (3rd ed.). Pearson, Page 223
E.g. a microinstruction can specify two simultaneous microoperations from F3 and F2 and none from F1 with these 9 bits: 000 100 101
Microprogram Example
M..Morris Mano. 1993. Computer System Architecture (3rd ed.). Pearson, Page 224
What’s next?
HW#5 is due on Tuesday 22nd
Reading:
Chapter 5:
Section 5.8 to 5.10
Chapter 7:
Section 7.1 to 7.3
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