EEE230 Intro to Pipelining
Reading: 4.6
EEE230
Pipelined datapath control
Division into 5 stages
Pipeline registers
Resource diagram
Control
Overview
2
MIPS Pipelined Datapath
WB
MEM
Right-to-left flow leads to hazards
3
Morgan Kaufmann Publishers
8 June, 2016
Chapter 4 — The Processor
3
Need registers between stages
To hold information produced in previous cycle
Pipeline registers
4
Morgan Kaufmann Publishers
8 June, 2016
Chapter 4 — The Processor
4
Cycle-by-cycle flow of instructions through the pipelined datapath
“Single-clock-cycle” pipeline diagram
Shows pipeline usage in a single cycle
Highlight resources used
c.f. “multi-clock-cycle” diagram
Graph of operation over time
We’ll look at “single-clock-cycle” diagrams for load & store
Pipeline Operation
5
Morgan Kaufmann Publishers
8 June, 2016
Chapter 4 — The Processor
5
IF for Load, Store, …
6
Morgan Kaufmann Publishers
8 June, 2016
Chapter 4 — The Processor
6
ID for Load, Store, …
7
Morgan Kaufmann Publishers
8 June, 2016
Chapter 4 — The Processor
7
EX for Load
8
Morgan Kaufmann Publishers
8 June, 2016
Chapter 4 — The Processor
8
MEM for Load
9
Morgan Kaufmann Publishers
8 June, 2016
Chapter 4 — The Processor
9
WB for Load
Wrong
register
number
10
Morgan Kaufmann Publishers
8 June, 2016
Chapter 4 — The Processor
10
Corrected Datapath for Load
11
Morgan Kaufmann Publishers
8 June, 2016
Chapter 4 — The Processor
11
MEM for Store
12
Morgan Kaufmann Publishers
8 June, 2016
Chapter 4 — The Processor
12
WB for Store
13
Morgan Kaufmann Publishers
8 June, 2016
Chapter 4 — The Processor
13
Form showing resource usage
Multi-Cycle Pipeline Diagram (resource Diagram)
14
Morgan Kaufmann Publishers
8 June, 2016
Chapter 4 — The Processor
14
State of pipeline in a given cycle
Single-Cycle Pipeline Diagram
15
Morgan Kaufmann Publishers
8 June, 2016
Chapter 4 — The Processor
15
Pipelined Control (Simplified)
16
Morgan Kaufmann Publishers
8 June, 2016
Chapter 4 — The Processor
16
Control signals derived from instruction
As in single-cycle implementation
Pipelined Control
17
Morgan Kaufmann Publishers
8 June, 2016
Chapter 4 — The Processor
17
Pipelined Control
18
Morgan Kaufmann Publishers
8 June, 2016
Chapter 4 — The Processor
18
5 stages
Pipeline registers hold
output from stage
Input into next stage
Resource diagram shows usage
Control
Determined in ID
Used in different stages
19
Review
/docProps/thumbnail.jpeg