Instruction Sequence
a. LW $t0, 0 ($sp)
ADD $t0, $t0, $t0
SW $t0, 0 ($sp)
b. ADD $t0, $a0, $a1
SUB $t1, $t0, $t1
ADD $t2, $t0, $t1
1. Indicate the dependencies present in the given code.
2. Assume there is no forwarding in this pipelined processor. Add NOP instructructions to eliminate
any hazards.
3. Assume there is full forwarding in this pipelined processor. Add NOP instructions to eliminate any
hazards.
Instruction Sequence
a. LW $t0, 0 ($sp)
ADD $t0, $t0, $t0
SW $t0, 0 ($sp)
b. ADD $t0, $a0, $a1
SUB $t1, $t0, $t1
ADD $t2, $t0, $t1
1. Indicate the dependencies present in the given code.
2. Assume there is no forwarding in this pipelined processor. Add NOP instructructions to eliminate
any hazards.
a. LW, NOP, NOP, ADD, NOP, NOP SW
b. ADD, NOP, NOP, SUB, NOP, NOP, ADD
3. Assume there is full forwarding in this pipelined processor. Add NOP instructions to eliminate any
hazards.
a. LW, NOP, ADD, SW
b. ADD, SUB, ADD