MIPS/SPIM Reference Card CORE INSTRUCTION SET (INCLUDING PSEUDO INSTRUCTIONS)
MNE- FOR- MON- MAT
IC
add
addi
addiu
addu
sub
subu
and
andi
nor
or
ori
xor
xori
sll
srl
sra
sllv
srlv
srav
slt
slti
sltiu
sltu
beq
bne
blt
bgt
ble
bge
j jal
jr jalr
move
lb
lbu
lh
lhu
lui
lw
li
la
sb
sh
sw
OPCODE/ FUNCT (Hex)
NAME
Add
Add Immediate
Add Imm. Unsigned
Add Unsigned
Subtract
Subtract Unsigned
And
And Immediate
Nor
Or
Or Immediate
Xor
Xor Immediate
Shift Left Logical
Shift Right Logical
Shift Right Arithmetic
Shift Left Logical Var.
Shift Right Logical Var.
Shift Right Arithmetic Var. Set Less Than
Set Less Than Imm.
Set Less Than Imm. Unsign. Set Less Than Unsigned Branch On Equal
Branch On Not Equal
Branch Less Than
Branch Greater Than
Branch Less Than Or Equal Branch Greater Than Or Equal Jump
Jump And Link
Jump Register
Jump And Link Register
Move
Load Byte
Load Byte Unsigned Load Halfword
Load Halfword Unsigned Load Upper Imm.
Load Word
Load Immediate
Load Address
Store Byte
Store Halfword
Store Word
R I I R R R R I R R I R I R R R R R R R I I R I I P P P P J J
R R
P I I I I I I P P I I I
OPERATION (in Verilog)
R[rd]=R[rs]+R[rt] (1) 0/20
R[rt]=R[rs]+SignExtImm (1)(2) 8
REGISTERS
NAME NMBR
USE The Constant Value 0
STORE? N.A. No
and No
No No Yes
(1) May cause overflow exception
(2) SignExtImm ={16{immediate[15]},immediate }
(3) ZeroExtImm ={16{1b’0},immediate }
(4) BranchAddr = {14{immediate[15]},immediate,2’b0 } (4) JumpAddr = {PC[31:28], address, 2’b0 }
(6) Operands considered unsigned numbers (vs. 2 s comp.)
BASIC INSTRUCTION FORMATS, FLOATING POINT INSTRUCTION FORMATS
$zero $at $v0-$v1
$a0-$a3 $t0-$t7 8-15
$s0-$s7 $t8-$t9 $k0-$k1 $gp $sp $fp $ra $f0-$f31
16-23 24-25 26-27 28
29 30 31 0-31
No R
26 25 26 25 26 25 26 25 26 25
0
1 2-3
Assembler Temporary Values for Function Results Expression Evaluation Arguments
Temporaries
Saved Temporaries Temporaries
Reserved for OS Kernel Global Pointer
Stack Pointer
Frame Pointer
Return Address
Floating Point Registers
4-7
Copyright ⃝c
This reference card may be used for educational purposes only.
No
Yes
Yes
Yes FR Yes FI Yes
0 fmt 2120 ft 1615 fs 1110 fd 65 funct 0
2007 Jan Wätzig, Staatliche Studienakademie Dresden (www.ba-dresden.de/∼jan)
31 opcode
I 31 opcode
J 31 opcode
31 opcode 31 opcode
rs 2120 rt 1615 rd 1110 shamt 65 funct 0 rs 21 20 rt 16 15 immediate 0
R[rt]=R[rs]+SignExtImm R[rd]=R[rs]+R[rt] R[rd]=R[rs]-R[rt] R[rd]=R[rs]-R[rt] R[rd]=R[rs]&R[rt]
R[rt]=R[rs]&ZeroExtImm R[rd]=∼(R[rs]|R[rt]) R[rd]=R[rs]|R[rt]
R[rt]=R[rs]|ZeroExtImm R[rd]=R[rs]ˆR[rt]
R[rt]=R[rs]ˆZeroExtImm R[rd]=R[rs]≪shamt R[rd]=R[rs]≫shamt R[rd]=R[rs]≫>shamt R[rd]=R[rs]≪R[rt] R[rd]=R[rs]≫R[rt] R[rd]=R[rs]≫>R[rt] R[rd]=(R[rs]
PC=JumpAddr R[31]=PC+4;
PC=JumpAddr
PC=R[rs] R[31]=PC+4;
PC=R[rs] R[rd]=R[rs]
R[rt]={24’b0, M[R[rs]+ZeroExtImm](7:0)} R[rt]={24’b0, M[R[rs]+SignExtImm](7:0)} R[rt]={16’b0, M[R[rs]+ZeroExtImm](15:0)} R[rt]={16’b0, M[R[rs]+SignExtImm](15:0)} R[rt]={imm,16’b0} R[rt]=M[R[rs]+SignExtImm]
R[rd]=immediate
R[rd]=immediate M[R[rs]+SignExtImm] (7:0)=R[rt](7:0)
M[R[rs]+SignExtImm] (15:0)=R[rt](15:0) M[R[rs]+SignExtImm]=R[rt]
(6) 0/2b (4) 4 (4) 5
(5) 2 (5) 2
0/08 0/09
(3) 20 (2) 24 (3) 25 (2) 25
f (2) 23
(2) 28 (2) 29 (2) 2b
immediate
fmt 21 20 rt 16 15 immediate 0
(2) 9 (2) 0/21 (1) 0/22
0/23
0/24 (3) c
0/27
0/25 (3) d
0/26 e 0/00 0/02 0/03 0/04 0/06 0/07 0/2a
(2) a
ARITHMETIC CORE INSTRUCTION SET
NAME
MNE- MON-
IC
FOR- MAT
OPERATION (in Verilog)
OPCODE/ FMT/FT/ FUNCT
Divide
Divide Unsigned
Multiply
Multiply Unsigned
div divu
mult multu
R R
R R
Lo=R[rs]/R[rt];
Hi=R[rs]%R[rt]
Lo=R[rs]/R[rt]; (6) Hi=R[rs]%R[rt]
{Hi,Lo}=R[rs]∗R[rt]
{Hi,Lo}=R[rs]∗R[rt] (6)
0/–/–/1a 0/–/–/1b
0/–/–/18 0/–/–/19
Branch On FP True Branch On FP False
bc1t bc1f
FI FR
if(FPCond) PC=PC+4+BranchAddr (4) if(!FPCond) PC=PC+4+BranchAddr (4)
11/8/1/– 11/8/0/–
FP Compare Single FP Compare Double
c.x.s∗ c.x.d∗
FR FR
FPCond=(F[fs] op F[ft])?1:0
FPCond=({F[fs],F[fs+1]} op {F[ft],F[ft+1]})?1:0 ∗(x is eq, lt or le) (op is ==, < or <=) (y is 32, 3c or 3e)
11/10/–/y 11/11/–/y
FP Add Single
FP Divide Single FP Multiply Single FP Subtract Single FP Add Double
FP Divide Double FP Multiply Double FP Subtract Double
add.s
div.s
mul.s
sub.s
add.d
div.d
mul.d
sub.d
FR FR FR FR FR FR FR FR
F[fd]=F[fs]+F[ft] F[fd]=F[fs]/F[ft] F[fd]=F[fs]∗F[ft] F[fd]=F[fs]-F[ft]
{F[fd],F[fd+1]}={F[fs],F[fs+1]}+{F[ft],F[ft+1]} {F[fd],F[fd+1]}={F[fs],F[fs+1]}/{F[ft],F[ft+1]} {F[fd],F[fd+1]}={F[fs],F[fs+1]}∗{F[ft],F[ft+1]} {F[fd],F[fd+1]}={F[fs],F[fs+1]}-{F[ft],F[ft+1]}
11/10/–/0 11/10/–/3 11/10/–/2 11/10/–/1 11/11/–/0 11/11/–/3 11/11/–/2 11/11/–/1
Move From Hi Move From Lo Move From Control
mfhi
mflo
mfc0
R R R
R[rd]=Hi R[rd]=Lo R[rd]=CR[rs]
0/–/–/10 0/–/–/12 16/0/–/0
Load FP Single Load FP Double
lwc1 ldc1
I I
F[rt]=M[R[rs]+SignExtImm] (2)
F[rt]=M[R[rs]+SignExtImm]; (2) F[rt+1]=M[R[rs]+SignExtImm+4]
31/–/–/– 35/–/–/–
Store FP Single Store FP Double
swc1 sdc1
I I
M[R[rs]+SignExtImm]=F[rt] (2)
M[R[rs]+SignExtImm]=F[rt]; (2) M[R[rs]+SignExtImm+4]=F[rt+1]
39/–/–/– 3d/–/–/–
ASSEMBLER DIRECTIVES
.data [addr]∗ .kdata [addr]∗ .ktext [addr]∗ .text [addr]∗
Subsequent items are stored in the data segment Subsequent items are stored in the kernel data segment Subsequent items are stored in the kernel text segment Subsequent items are stored in the text
∗ starting at [addr] if specified
.ascii str .asciiz str .byte b1,...,bn .double d1,...,dn .float f1,...,f1 .half h1,...,hn .word w1,...,wn .space n
Store string str in memory, but do not null-terminate it
Store string str in memory and null-terminate it
Store the n values in successive bytes of memory
Store the n floating-point double precision numbers in successive memory locations Store the n floating-point single precision numbers in successive memory locations Store the n 16-bit quantities in successive memory halfwords
Store the n 32-bit quantities in successive memory words Allocate n bytes of space in the current segment
.extern symsize .globl sym
Declare that the datum stored at sym is size bytes large and is a global label Declare that label sym is global and can be referenced from other files
.align n .set at .set noat
Align the next datum on a 2n byte boundary, until the next .data or .kdata directive Tells SPIM to complain if subsequent instructions use $at
prevents SPIM from complaining if subsequent instructions use $at
SYSCALLS EXCEPTION CODES
SERVICE
$v0
ARGS
RESULT
print_int
1
integer $a0
print_float
2
float $f12
print_double
3
double $f12/$f13
print_string
4
string $a0
read_int
5
integer (in $v0)
read_float
6
float (in $f0)
read_double
7
double (in $f0)
read_string
8
buf $a0, buflen $a1
sbrk
9
amount $a
address (in $v0)
exit
10
Number
Name
Cause of Exception
0
Int
Interrupt (hardware)
4
AdEL
Address Error Exception (load or instruction fetch)
5
AdES
Address Error Exception (store)
6
IBE
Bus Error on Instruction Fetch
7
DBE
Bus Error on Load or Store
8
Sys
Syscall Exception
9
Bp
Breakpoint Exception
10
RI
Reserved Instruction Exception
11
CpU
Coprocessor Unimplemented
12
Ov
Arithmetic Overflow Exception
13
Tr
Trap
15
FPE
Floating Point Exception
[1] Patterson, David A; Hennessy, John J.: Computer Organization and Design, 3rd Edition. Morgan Kaufmann Publishers. San Francisco, 2005.
Copyright ⃝c 2007 Jan Wätzig, Staatliche Studienakademie Dresden (www.ba-dresden.de/∼jan) This reference card may be used for educational purposes only.