CS代考 MOSFET (I): Fundamentals

MOSFET (I): Fundamentals
I – V Characteristics
Cutoff Region
Linear Region

Saturation Region (pinch-off region)
Switch model of nMOSFETs
Reading: Chapter 3.3
https://www.xjtlu.edu.cn/en/departments/academic-departments/electrical-and-electronic-engineering/staff/chun-zhao

Ec(O) aend electric field directioen
-qV =Ec(O)
-qV =Ec(O)

Energy band diagram: Vg>Vm Inversion:
Minority carriers Vg

Energy band diagram: Vg>
Inversion:
Minority carriers

Energy band diagram: Vg>Vm

As Vg>Vm, EFS is at the up-half of the bandgap
At the interface EFS Ec
Inversion:
Minority carriers x Vg

Energy band diagram: Vg>
Inversion:
Minority carriers

n =n exp(EF −Ei,surf ) t s i  kT 
electrons/cm3
Qinv = q ns t

➢ Weak Inversion: 0<n<F (F < S < 2F) ➢ Strong Inversion: n≥F (S ≥ 2F), electron density at the interface ≥ hole density in Si bulk. ➢ Vg for strong inversion: VT ‘threshold voltage’. → n = F → ns = pb Vg=VT →s=2F n =n exp(EF −Ei,surf ) s i  kT  p =n exp−(EF −Ei,bulk) b i  kT  xd =NA p n2 /n sis Voltage drops in a MOS system V =V +V + V =V +V +2 T FB ox F 2qNAeSi(2F ) Cox 2qNDeSi Cox for p-Si sub. for n-Si sub. • NMOS: N-channel Metal Oxide Semiconductor • L = channel length • W = channel width “Metal” (heavily doped poly-Si) • A GATE electrode is placed above (electrically insulated from) the silicon surface, and is used to control the resistance between the SOURCE and DRAIN regions Gate oxide Consider the current IG (flowing into G) versus VGS : − semiconductor − always zero! The gate is insulated from the semiconductor, so there is no significant (steady) gate current. I - V Characteristics Cutoff Region Linear Region Saturation Region (pinch-off region) Switch model of nMOSFETs nMOSFET: VGSVT
Inversion layer charge expressions are (the surface potential s is 2F ):
Inversion layer charge Threshold voltage
Q =−C(V−V) inv ox G T
2qNAeSi(2F ) Cox
V =V +2 + T FB F

Inversion layer
Qinv × W × L = q × n × t × W × L → Qinv = q n t
⚫ Without gate bias, MOSFET is off because two diodes are “back-to-back”. One of them will be reversely biased. To switch on, the interfacial region is inverted by applying a gate bias.
⚫ Above a certain gate-to-source voltage (threshold voltage VT), a conducting layer of mobile electrons is formed at the Si surface beneath the oxide. These electrons can carry current between the source and drain.

Electrical Resistance
R  V = = rL = I tW
(Unit: ohms)
Resistance
where r is the resistivity (W•cm)
 r  L   t   W 

Lecture 4 Page 35
Electrical Conductivity s
Negatively charged electron
Direction of electron drift
When an electric field is applied, current flows due to drift of mobile electrons and holes:
electroncurrentdensity: holecurrentdensity:
Jn =(−q)nve =qnnE Jp =(+q)pvh =qppE
J=Jn +Jp =(qnn +qpp)E
Units: (W•cm)-1 19
total current density:
conductivity
s qnn +qpp

Lecture 4 Page 36
Electrical Resistivity r
s qnn +qpp
r  1 qp p
for n-type material
for p-type material (Units: ohm•cm)

Inversion layer as a resistor
Consider an n-channel:
R n-=chRann(eLl/W) DS S
Rs=r=1= 1 = 1 t st qnt Q
where Qinv is the charge per unit area. Qinv = q ns t
s qnn +qpp

nMOSFET ID vs. VDS Characteristics Next consider ID (flowing into D) versus VDS, as VGS is varied:
G D ID oxide VDS
semiconductor −
zero if VGS < VT Above “threshold” (VGS > VT): “inversion layer” of electrons appears, so conduction between S and D is possible
Below “threshold” (VGS < VT): no charge→no conduction IDS =0ifVGS VT VDS
Linear or Resistive or ohmic or “Triode” Region: 0 < VDS < VGS − VT MOSFET as a Controlled Resistor (cont’d) Let’s deduce ID from RDS R =R(L/W)=L/W= L/W DS s nQinv nCox(VGS −VT −VDS ) 2 ID =VDS RDS I =C W(V −V−VDS)V D noxLGS T 2DS We can make RDS low by • applying a large “gate drive” (VGS − VT) • making W large and/or L small average value of V(x) I - V Characteristics Cutoff Region Linear Region Saturation Region (pinch-off region) Switch model of nMOSFETs MOSFET as a Controlled Resistor (cont’d) ID = Cox(W/L)[(VGS - VT)VDS-VDS2/2] (1) it applies only for the condition VDS<(VGS - VT) (This is called the ‘below pinch-off condition.’) _VDS + n-channel dID/dVDS =Cox (W/L) [(VGS-VT) -VDS]=0 so that VDS,sat = VGS - VT non-physical I =CW(V−V) (2) D,sat 2LGST for a given VGS MOSFET as a Controlled Resistor (cont’d) I = nCOx W (2(V −V )V −V 2 ). (1) for a given VGS D 2 L G T DS DS Note for V V −V =V DS G T DS,sat , result is non-physical. At VDS,sat, ns,x=L =0 assume that channel curr. is const forVDS VDS,sat n Ox I =CW(V−V) (2) D,sat 2LGST which is called the ‘above pinch-off equation’. What is “Pinch off” ? ⚫ For a given VGS, you have a maximum amount of current you can flow through the channel (regardless of VDS). ⚫ When VDS = VGS - VT the channel is flowing as much current as it can so we call it pinched off (even though current continues to flow). VDS >VGS-VT
Below pinch-off VDS VGS-VT
pinch-off point VDS =VGS -VT

What is “Pinch off” ?
⚫ For a given VGS, you have a maximum amount of current you can flow through the channel (regardless of VDS).
⚫ When VDS = VGS – VT the channel is flowing as much current as it can so we call it pinched off (even though current continues to flow).
VDS > VGS – VT
(above pinch-off)
pinch-off region

What is “Pinch off” ?
⚫ For a given VGS, you have a maximum amount of current
you can flow through the channel (regardless of VDS).
⚫ When VDS = VGS – VT the channel is flowing as much current as it can so we call it pinched off (even though current continues to flow).
VDS >VGS-VT
non-physical

Why “Pinch off” ?
• As VDS increases, the inversion-layer charge density at the drain end of the channel is reduced; therefore, ID does not increase linearly with VDS.
• When VDS reaches VGS − VT, the channel is “pinched off” at the drain end, and ID saturates (i.e. it does not increase with further increases in VDS).
• In the pinched-off region:
Qinv(x) = -Cox[VGS – VT – VDS,sat] = 0 VDS >VGS-VT
I =CW(V−V)2 D,sat n ox2L GS T
– VGS – VT
pinch-off region

ID vs. VDS or VGS Characteristics
I =nCOxW(2(V −V)V −V2 ). (1) D 2 L GS T DS DS
ForVDS VDS,sat n Ox
I =CW(V−V) (2)
D,sat 2LGST
The graphs shows ideal charactersitics. The
top graph is the output characteristic, the I lower one is the transfer characteristic. I D Equations (1) and (2) are the simple form
of the design equations.
The quantity Cox (W/L) =  is the device constant. The designer can only vary W/L so as to change . Other values are fixed during the process development.

I – V Characteristics
Cutoff Region
Linear Region
Saturation Region (pinch-off region) Switch model of nMOSFETs

Switch Model of nMOS Transistor
| VGS | Source
(of carriers)
Drain (of carriers)
Open (off) (Gate = ‘0’)
Closed (on) (Gate = ‘1’)
R = VDS / ID

Transistor in Linear Mode VD
n+ – V(x) +
VGS-VT VDS
WhenVDS VGS –VT: ID =0W/L[(VGS –VT)VDS –VDS2/2] 0 = nCox
R = VDS / ID

Transistor in Saturation Mode
VDS > VGS – VT
n+ – VGS – VT + n+ Pinch-off
When VDS  VGS – VT : ID = (0/2) W/L [(VGS – VT) 2] The current remains constant (saturates).
R = VDS / ID =?

nMOSIC – MOST as a Linear RDS
When VDS  VGS – VT
ID = 0 W/L [(VGS – VT)VDS – VDS2/2]
For small VDS, there is a linear dependence between VDS and ID, hence
1/RDS = ID/VDS
= 0 W/L [(VGS – VT) – VDS/2]
≈0 W/L(VGS –VT) VG
VGS-VT VDS

nMOSIC – MOST as a Load
The use of a load resistor (an
WhenVDS VGS –VT :
implanted layer) leads to rather
large structures.
2 = ( /2) W/L [(V – V ) ]
The need to minimise the area of silicon involved is paramount (see 1st Lecture).
One method is to use a MOST
( frequently called a MOSFET)
as a load. 0
In this case the gate and the drain are connected together so that VGS=VDS. The pinch off point coincides with VGS-VT=VDS-VT.
The characteristic of the load is shown. It extends along the drain axis by an amount VT.
VDS-VT VGS-VT

nMOSIC – The MOST as a Load ⚫ Problem
Calculate the resistance of a load MOST with an aspect ratio of 1 when the mobility of the electrons is 1000cm2V-1sec-1 and the gate capacitance per unit area is 10-2Fm-2. The drain voltage is VD=5V and the threshold voltage VT= 0.5V.
⚫ Solution
The drain current is
ID = n (W/L) Cox (VG -VT)2/2.
but VG=VD so that ⚫ R=100W
R=VD/ID=…

nMOSIC – The MOST as a Load ⚫ Problem
Calculate the resistance of a load MOST with an aspect ratio of 1 when the mobility of the electrons is 1000cm2V-1sec-1 and the gate capacitance per unit area is 10-2Fm-2. The drain voltage is VD=5V and the threshold voltage VT= 0.5V.
⚫ Solution
The drain current is the same as at the pinch-off point where
ID =(W/2L) Cox (VG -VT)2. but VG=VD so that
ID =(W/2L) Cox (VD -VT)2 ID/VD=1/R= (W/2L) Cox (VD -VT)2/VD = 0.1*0.5*10-2*4.52/5=0.2025*10-2,

程序代写 CS代考加微信: powcoder QQ: 1823890830 Email: powcoder@163.com

Related Posts