9.1
Solution:
9.2:
Solution:
The logic function realized can be written from the PDN as:
̅
Y = A(B + C) or equivalently:
̅̅̅̅̅̅̅̅̅̅̅̅ Y = A(B + C)
Inspecting the PUN circuit reveal the potential for eliminating two transistors through what is known as path merging.
However, an alternative way to synthesize a PDN with a lower number of transistors. By using the DeMorgan’s law:
̅̅̅̅̅̅ ̅̅̅̅̅̅ ̅̅̅̅̅̅ ̅̅̅̅̅̅̅̅̅̅
Y = ABC. ABC. ABC = (A + B + C)(A + B + C)(A + B + C)
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9.3:
Solution:
b)
NM =V −V =1.5−1.2=0.3V H OH IH
NM =V −V =1.1−0.3=0.8V L IL OL
Slope = VOH−VOL = 1.5−0.3 = −12
Thus,
VIL−VIH
1.1−1.2
V −0.3 M
V −1.2 M
=−12→V =1.13V M
C) The voltage gain in the transition region is equal to the slope found above, thus Gain=-12
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