Welcome to Computer Organization and Assembly!
CPU Intro
CS/COE 0447
Jarrett Billingsley
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Class announcements
yaaaaay it feels like spring
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ISA and hardware design
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Remember what an ISA is?
it’s the software interface the programmer uses to control the CPU
what are some important aspects of the MIPS ISA?
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how many registers does it have?
how big are they?
what instructions does it have?
how does it access memory?
how are they encoded into binary?
are there any special registers?
how many operands do they have?
the ISA abstracts the hardware design
but the hardware must implement the ISA, so…
– Instruction Set Architecture
– it has 32 32-bit registers, plus 3 more…
– $zero is always 0, and ra is used by jal, but otherwise they’re identical
– HI and LO are 32 bits and are used by the multiplication and division instructions
– the PC is 32 bits and is its own thing
– it has lots of instructions: arithmetic, conditional branches, loads and stores, jumps…
– instructions can have 0-3 operands, of which 1 or 2 can be sources, and 0 or 1 can be destinations
– there are actually 3 instruction formats: R, I, and J
– only loads and stores access memory
– it can access 8, 16, or 32-bit values from memory
– the memory address that is accessed is a register + an immediate offset
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Tension you can cut with a knife
designing an ISA is an act of balancing many, many factors.
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more registers!
more powerful instructions!
more bits!
run this popular language fast!
make the OS faster!
propagation delay!
materials cost!
power and heat!
manufacturing ability!
verifiability!
the users have demands…
…and the implementers have limits.
– verifiability means “mathematically proving that your design is right and has no bugs,” which is often left in the dust in favor of constantly churning out new features and performance improvements
– which is how we’ve gotten where we are now, with hundreds of bugs and dozens of vulnerabilities in our CPUs
– yes, hardware can absolutely have bugs too.
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Meeting in the middle
first we broke software into small pieces
now we’ll break hardware into small pieces
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????????????????
MUXes, FSMs, etc.
Gates and Latches
Transistors
Physics and Electricity
Control Structures
ASM Instructions
Machine Code
the ISA specifies the software interface to the CPU…
but what does the CPU look like? what parts does it have? how does it understand the instructions?
where does the magic happen?
– in most complex systems, the “magic” comes from the ways things are interconnected, rather than from the pieces themselves
– this is what the overused phrase “more than the sum of its parts” means
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Microarchitecture
microarchitecture is the hardware design of the CPU itself.
the microarchitecture is an implementation of an ISA.
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and like interfaces in Java, there can be many implementations of the same ISA.
interface X86_64
class Core_i7
implements X86_64
class Zen
implements X86_64
class Nano
implements X86_64
but there is a lot of freedom in how the CPU actually implements that interface.
– we may have been using x64 for almost 20 years, but the CPUs today are drastically different in design than the original x64 designs.
– abstraction gives us a lot of freedom to change things!
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Only kinda sorta MIPS
we’ll use MIPS for context…
but this stuff applies to virtually any architecture.
such as the architecture you’ll implement for the last project!!
the book doesn’t use MIPS either
it uses DLX: a simplified, modernized version of MIPS
the hardware in the book is extremely hand-wave-y (what’s jal?)
but they go into way more detail than needed for some things…
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CPU Organization
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Control
Registers
Datapath
Processor
Memory
Remember this?
unresolved questions:
what’s the control?
what’s the datapath?
how does it know what instruction to get next?
how does it know which registers to access?
how does it know whether it should add, subtract, etc.?
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Program
instruction
3
5
+
8
A
B
C
Zooming in
there are a few major parts of any CPU:
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Control
Registers
Datapath
t0
s4
at
fp
eax?
sp
+
–
×
÷
⊕
∫
&
hi i’m memory!!
registers hold the values being computed
the datapath computes new values
☃
if(add)
do this
else if…
values move between them
the control tells everything else what to do, and when
control signals!
– what, you’ve never seen the snowman operator?
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OKAY, MEMORY, WHAT DO YOU WANT??
registers are just a temporary stopping point for your program’s data
you could have a computer with few/no registers at all!
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Control
Datapath
Memory
this is a memory-memory machine
if you squint and wave your hands really hard, every computer is.
the registers and the memory only differ in their speed and size.
– really, we only have registers because our memory technologies are imperfect and we have to play to the strengths of each.
– if we suddenly had a breakthrough in memory technology, we could unify the registers, memory, and persistent storage and be done with it.
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Parts of the CPU
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Microarchitectural
Architectural
Architectural and general-purpose registers
the registers that the ISA specifies are the architectural registers
and of those, the general-purpose registers (GPRs) are the ones that you can use for any purpose in your programs
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GPRs
tx
ax
vx
sx
sp
fp
zero
kx
pc
hi
lo
microarchitectural registers exist outside the ISA and are instead part of the implementation of the CPU.
they’re used for temporary storage, to implement multi-step operations, to control special features, etc.
they are often (but not always!) inaccessible from software.
– many CPUs have debugging registers that are not accessible by normal means, but can be accessed through “secret” means like JTAG (a way of debugging hardware)
– there are often “temporary” registers the CPU uses to implement multi-step (complex) instructions
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The register file
the register file holds the general-purpose registers.
it’s like an array of registers, or a small word-addressed memory.
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notice how the MIPS registers are numbered?
D
Q
en
D
Q
en
D
Q
en
D
Q
en
etc…
D
Q
en
D
Q
en
$0
$1
$2
$3
$4
$5
register number go in…
register value come out.
maybe two at a time.
that might be useful.
and we should also be able to put values into them, too.
don’t worry, we’ll see how it works. but that’s really all it is.
– dunno why it’s called a file… it’s likely historical.
– actually we don’t need a register for $0, since it’s just….. zero……………….
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The Arithmetic and Logic Unit (ALU)
in MIPS the datapath consists pretty much entirely of the ALU.
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ALU
in all the arithmetic and logic (bitwise) instructions, how many operands are there?
what kind of operations do we have to be able to do?
A
B
+
–
×*
÷*
&
|
^
~
<<
>>
*multiplication and division are kinda weirdos…
– 2. allllways 2.
– we might consider putting mult/div in their own unit, separate from the ALU, but another component of the datapath.
– cause they’re slower.
– we’ll talk about this okay
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Control
The program counter and control
the PC is part of the control: it says what step to do next.
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Memory
0xAC30
PC
the PC is a memory address, so we send that to memory.
the memory sends back some data: an instruction.
0xC0DE
the control decodes the instruction and tells everything else what to do.
this is an add instruction!
the source regs are t0 and t8…
– ooh, maybe that instruction goes into a microarchitectural register!
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The bottomless pit of control
the registers and datapath are actually pretty simple.
control is where things get… interesting.
we’ll be studying the simplest kinds of control
but there’s no real upper limit on the complexity of control.
in a sense, CPU design is control design. the other parts are largely interchangeable.
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– and when I say interchangeable, I mean it – it’s common for CPU designers to reuse parts of CPUs in many designs, even in implementations of different ISAs!
– e.g. AMD made a RISC ISA, the 29k, which didn’t last for long…
– but their K5 (Pentium equivalent) was a 29k with an x86 instruction decoder bolted on the front and it worked pretty damn well
– funny cause that’s basically how all x86 CPUs are now designed
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Control
Registers
Datapath
Processor
Memory
So, to recap
the Control pulls an instruction from memory.
the Control decodes and interprets the instruction.
the Memory sends values into the registers (loads).
the Registers send values to the Datapath, where they are manipulated.
the results are put back into the Registers.
the values are stored back into Memory.
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Program
instruction
3
5
+
8
A
B
C
A small taste of design
this is really just for context don’t worry about remembering this okay
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Tug-of-war
register file design is constrained by many competing factors.
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compilers love lots of identical registers!
more registers means more silicon…
humans like intuitive assembly language!
ISA says instructions have 2 operands and 1 destination
with lots of registers, function calls are faster!
…except for this one instruction that has 2 destinations.
multi-issue CPU: need to read 4 regs and write 2
…but context switches are slower.
…but there are diminishing returns.
fast L1 cache? not as many regs needed
D
Q
D
Q
D
Q
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It doesn’t have to be this way
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CISC CPUs usually have small sets of registers, and many have special purposes or behaviors
RISC CPUs usually have 32* mostly-interchangeable registers: MIPS, RISC, SPARC, ARMv8, AVR, RISC-V…
8086
ax
bx
cx
dx
si
di
sp
bp
6502
A
X
Y
z80
a f
b c
d e
h l
ix
iy
sp
PDP8
AC
*or 32 at a time
r0 r1 r2 r3 r4 r5 r6 r7
r8 r9 r10 r11 r12 r13 r14 r15
r16 r17 r18 r19 r20 r21 r22 r23
r24 r25 r26 r27 r28 r29 r30 r31
why? well, what do you remember about the differences between RISC and CISC?
32/64 bits
16 bits
8 bits
12 bits
– RISC is made for compilers to write programs; CISC is made for humans to write programs.
– humans are weird, can only keep a few things in their brains at once, and need help with names and stuff.
– compilers want lots of identical registers because then it’s much easier to produce machine code algorithmically.
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Monkeys and Ladders
ever hear this story?
the thing is…
sometimes, the hose is real.
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it’s hard to tell if we’re all doing something “just because” or because there’s a good reason.
image credit: throwcase.com
don’t waste time reinventing the wheel.
first, find out why the wheel is shaped that way.
– apocryphal story of an experiment done on monkeys. n monkeys in a room with a ladder and a bunch of bananas at the top. if monkey tries to climb ladder, they get sprayed with a hose. eventually the monkeys learn not to go up the ladder. then one monkey is replaced, and the other monkeys teach it not to go up the ladder. then another monkey is replaced, and that one is taught not to go up the ladder. eventually, all the original monkeys are replaced, but none of them want to go up the ladder. none of them have been sprayed. why don’t they go up the ladder? cause everyone said not to!
– if you find out why the wheel is shaped that way, then you can decide if it’s a bullshit reason or not.
– 32 registers just happens to be a nice number of registers. 16 might even be better, but there’s not much of a compelling reason to switch.
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A word of advice
you will see many imperfect designs in your life
but in problem-solving, perfection isn’t always the goal
everyone has to work within the constraints they’re given
also don’t be a judgmental ass about someone else’s design because one, it’s shitty, and two, they know more about why it was designed that way, so you’re just being presumptuous
9 times out of 10 it’s because their boss told them to
the profit motive messes with a lot of things.
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– R I S E U P
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