Question 1 Architecture MIPS (33 pts)
a) (10 pts) Translate the high-level code shown below into MIPS assembly language. Comply with all MIPS conventions. int main(void)
{
return S(4);
}
int S(int a) {
if(a < 0)
return 0;
else
}
return a + S(a-1);
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b) (5 pts) Translate the fragment of the C code presented below into MIPS assembler by assigning the variables i, j, k, c, d to the registers $t0 - $t4.
void f(){
unsigned int i = 129;
unsigned int j = 6534;
unsigned int k;
int c=1;
int d=1;
k = i*j;
k++;
d = c*d;
d++;
return; }
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c) (18 pts) Traduire le code du langage d’assemblage MIPS en code machine en supposant que votre programme est placé en mémoire à partir de l’adresse 0040000016. L’encodage des instructions MIPS ainsi que la table des registres sont donnés dans l’annexe. Compléter les colonnes « Adresse », « Code en binaire », « Code machine en base 16 » et « Mode d’adressage », en indiquant le mode d’adressage utilisé pour chaque instruction.
Adresse
Code en mnémonique
Code en binaire
Code machine en base 16
Mode d’adressage
00400000
addi $a0,$0,-5
jal f
add $s0,$0,$v0
f:
add $t0,$0,$a0
loop:
sll $t0,$t0,1
beq $t0,$0,fin
j loop
fin :
add $v0,$0,$0
jr $ra
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Question 2. Microarchitecture MIPS (20 pts)
a) (10 pts) Change the MIPS data path (without touching the ALU), multi-cycle implementation (if necessary) to implement the srav (shift right
arithmetic variable) instruction - a variable arithmetic shift to the right. Use the initial scheme given.
Assembler: srav rd, rt, rs
#load into a destination register the source register value shifted to the right of N #bits where N is a value represented on 5 least significant bits of the register rs ([rs] 4: 0)
Machine code fields:
opcode rs rt rd shamt funct [rd] = [rt] >>> [rs]4:0
b) (10 pts) Modify the finite state machine of the multi-cycle MIPS version to complement the implementation of the srav instruction.
000000
000111
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S0: Fetch
S1: Decode
Reset
S2: MemAdr
IorD = 0 AluSrcA = 0 ALUSrcB = 01 ALUOp = 00 PCSrc = 00 IRWrite PCWrite
Op = LW or Op = SW
S11: Jump
ALUSrcA = 0 ALUSrcB = 11 ALUOp = 00
Op = J
Op = ADDI Op = BEQ
S8: Branch
ALUSrcA = 1 ALUSrcB = 00 ALUOp = 01 PCSrc = 01 Branch
PCSrc = 10 PCWrite
Op = R-type
S6: Execute
ALUSrcA = 1 ALUSrcB = 00 ALUOp = 10
S7: ALU Writeback
RegDst = 1 MemtoReg = 0 RegWrite
S9: ADDI Execute
ALUSrcA = 1 ALUSrcB = 10 ALUOp = 00
Op = LW S3: MemRead
IorD = 1
Op = SW
S5: MemWrite
IorD = 1 MemWrite
ALUSrcA = 1 ALUSrcB = 10 ALUOp = 00
S10: ADDI Writeback
RegDst = 0 MemtoReg = 0 RegWrite
S4: Mem Writeback
RegDst = 0 MemtoReg = 1 RegWrite
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Question 3 (17 pts) Enters :
Hazard Unit
Exits :
a) (17 points) Write in VHDL a “Hazard Management Unit” combinatorial module with the functionalities specified below.
“Forwarding” logic
if ((rsE != 0) AND (rsE == WriteRegM) AND RegWriteM) then else if ((rsE != 0) AND (rsE == WriteRegW) AND RegWriteW) then else ForwardAE = 00
Logic of “Stall”:
lwstall = ((rsD == rtE) OR (rtD == rtE)) AND MemtoRegE StallF = StallD = FlushE = lwstall
ForwardAE = 10 ForwardAE = 01
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StallF
ForwardAE
StallD
FlushE
rsE
lwstall
WriteRegW
rtE
rsD
WriteRegM
RegWriteM
RegWriteW
rtD
MemRegE
Question 4 (15 pts)
a) (5 pts) Consider the version of MIPS with pipeline seen in class.
Indicate existing dependencies by circling a dependency register and drawing an arrow showing the source dependency register.
Draw directly in the table, left column.
Exemple: sub $s4, $s2, $s3 and $t2, $s4, $t0
Code
Stat of pipeline
lw $t0, 40($s0) #M[40+$s0] = 25
IF ID EXE MEM WB
add $t1, $t0, $s1 #$s1 = 45
addi $t0, $t0, -2
and $t2, $s4, $t0 #$s4 = 0x0000000F
beq $t2, $0, end
ori $s4, $s4, 0xF000
end: sw $s4, 80($t1)
b)
(5 pts) In the right column of the table, show a pipeline state including any “stalls” when executing the instructions in the left column. With the arrows show the “forwardings”, if there are any.
The first line is completed for you.
c) (5 pts) Calculate the average CPI – the average number of cycles per instruction, for this piece of code.
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Question 5 (15 pts)
a) (5 pts) Program a logic function using ROM memory.
Draw the ROM by specifying its size (refer to the drawing on slide 85, Digital Components). Use point notation for programming.
f (a, b, c, d ) a b c d
Schematically implement this logic function using a multiplexer
b) (5 pts) 16 to 1
c) (5 pts) 8 to 1.
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