CS计算机代考程序代写 cache AI Operating Systems CMPSC 473

Operating Systems CMPSC 473
Context Switching Overheads
March 25, 2021 – Lecture 18 Instructor: Bhuvan Urgaonkar

Exam 1 scores

Scores so far

AI violations update
• You will be asked to have a face-to-face interview with me or the TAs if:
• Your code has high similarity with another team’s code, or
• You scored high on Project 2 but poorly on Exam 1
• Your git commit behavior is suspicious
• E.g., 0 on checkpoint 1 and a high score later
• We have discovered through other means that you may have cheated • Similar approach in Projects 3 and 4

Context Switching Recap

Context Switching Overheads
• Direct (or explicit) overheads
• Time to save and restore registers
• Time to run other OS tasks such as trap or interrupt handler
• Time to run the CPU scheduler

Context Switching Overheads
• Indirect (or implicit) overheads • Cache pollution
• TLB flush or pollution

Ideas so far
• Overheads of context switching
• Direct – fixed
• Indirect – idiosyncratic, complex
• Cache pollution • TLB flush

Lowering CS overheads
Idea/technique
Remarks
Increase quantum size
Too big => poor responsiveness => FIFO
Divide interrupt/trap processing into urgent and non-urgent portions
Top and bottom handlers
Improve CPU scheduler
Use threads instead of processes within an application
Devise and implement better policies for caches, TLB, page replacement
Your idea comes here
Your idea comes here

Why is the OS in every address space?
• Kernel/user switch becomes much less expensive than a context switch
• No need to flush the TLB • Any downsides of this?