ECS 50 (Winter 2021) Exam #3
Time limit: 120 minutes
Problems Q1
Which of the following coding jobs would you prefer? Assume factors like standard of living are constant.
( ) Python programmer that makes $80,000/year.
( ) C programmer that makes $100,000/year.
( ) x86-64 assembly code programmer that makes $120,000/year.
Q2
Suppose that we represent real numbers with the following floating-point format:
Sign: 1 bit.
Exponent: 3 bits. (excess-3 format, so the exponents that can be represented are $-3_{10}$ to $4_{10}$)
Mantissa: 2 bits. (implicit leading 1)
Which of the following base 10 values can be perfectly/accurately represented by the above format? Select all that apply. For each value that can be, give the representation in the below text box, using the above format.
[ ] $\frac{2}{6}$ [ ] $0.375$
[ ] $22$
[ ] $-2.5$
[ ] None of the above. |____|
Q3
I mentioned during lecture that x86-64 supports the I/O address space approach for supporting access to ports. Conversely, RISC-V supports the memory-mapped I/O approach for supporting access to ports. One characteristic of RISC architectures, such as the RISC-V ISA, is an attempt to keep the number of instructions low. Explain how this characteristic may have influenced the decision for RISC-V to support the memory-mapped I/O approach over the I/O address space approach.
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Q4
Suppose that we represent real numbers with the following fixed-point format: Sign: 1 bit.
Integer component: 2 bits. Fractional component: 3 bits.
Which of the following values can be represented by the above format? For each value that can be, give the representation in the below text box, using the above format.
[ ] $8$
[ ] $-7.5$
[ ] $1.25$
[ ] $-2.375$
[ ] None of the above.
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Q5
Suppose that the designers of the C programming language introduced a signed integer type called butner that supported values in the range $-12_{10}$ to $11_{10}$. What would be the minimum number of bits that this type needs in order to support its range of values? (Assume that the number of bits need not be a multiple of 8.) Justify your answer.
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Q6
Is the following statement true or false?
Statement: Assuming that no overflow occurs, left shifting an unsigned integer twice, then (logically) right shifting it once, and then left shifting it twice again, is the same as multiplying the integer by 8.
( ) True. ( ) False.
If you picked False, provide a counterexample below and explain why it is a counterexample. (If you picked True, then leave the box blank.)
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Q7
Left rotating a string of bits is the same as left shifting it, except that the leftmost bit (the MSB) — instead of being thrown out — is moved to the rightmost bit (the LSB). Below are a few examples.
If we left rotate $10110_2$, we get $01101_2$. (Notice that the LSB became $1$ since the MSB was $1$ before the rotation.)
If we left rotate $0011_2$, we get $0110_2$. (Notice that the LSB became $0$ since the MSB was $0$ before the rotation.)
If we left rotate $1101_2$, we get $1011_2$.
Explain how we could implement left rotation with some combination of any of bitwise AND, bitwise OR, bitwise XOR, bitwise NOT, left shift, and/or right shift (whether logical or arithmetic). You do not need to use all of these bit operations. Also, if you wish, you can make use of if/else kind of logic (i.e. like conditional statements).
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Q8
Consider the below MiniCUSP machine code. (Ignore the strange coloring; I’ve no idea how to fix that.)
FFF013
000005
002005
4A2000
FFFFFF
000053
000009
000009
000009
000009
000009
000009
How many labels were involved in the assembly code that was used to create the above program? Explain how you know. If, instead, more information is needed, then explain why / what information is needed.
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Q9
For this question, assume that we’re using RISC-V and that we thus have the five instruction stages (IF, ID, EX, MEM, and WB) described on slide #14 of the RISC-V slide deck. Suppose that it was impossible to read from the register file and write to it simultaneously. (In other words, suppose that it was impossible to read registers’ values and change a register’s value simultaneously.) Answer the following questions.
Q9.1
Which two of the five stages would be impossible to do simultaneously. (Only select two choices.)
[ ] IF
[ ] ID
[ ] EX
[ ] MEM [ ] WB
Q9.2
Which kind of pipeline hazard would be introduced?
( ) Structural hazard. ( ) Data hazard.
( ) Control hazard.
Q10
Consider the below C function that takes as argument the starting address of a contiguous two- dimensional array (not a pointer array).
int foo(int** arr, int nr, int nc) {
int s = 0;
for (int i = 0; i < nc; i += 2)
for (int j = 0; j < nr; j++) s += arr[j][i];
return s; }
Would the above code take better advantage of spatial locality of references to data if arr were stored in row-major order? Or if arr were stored in column-major order? Justify your answer.
Ignore the fact that in C, arr would always be stored in row-major order. Also, ignore the interaction between spatial locality and instructions; just focus on data accesses. Do not assume that either of nr or nc is small.
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Q11
Which of the following occurs after an I/O device sends an interrupt to the CPU? Select all that apply.
[ ] The CPU stops doing the instruction cycle entirely until the interrupt is resolved, e.g. by an interrupt service routine (ISR).
[ ] The CPU takes the address of the instruction that it would have fetched next (if there had been no interrupt) and stores this address somewhere, e.g. in the stack.
[ ] The CPU finishes whatever program it is currently running and then jumps to the ISR of the device that triggered the interrupt.
[ ] None of the above.
Q12
For this problem, in the .data section, there will be five 32-bit integer variables called a, b, c, d, and result. The initial value of result will not always be -1. Below is an example.
.data a:
.word 5 b:
.word 10 c:
.word 3 d:
.word 9
result:
.word -1
Write RISC-V assembly code that sets result to 1 if the sum of the values in the variables a and b is greater than the sum of the values in the variables c and d. Otherwise, result should be set to 0. If the values in the above example are used, such that the sum of the values in a and b is 15 and the sum of the values in c and d is 12, then result would be set to 1. Provide any additional variables that you would need to add to the .data section.
Hints: To store an element in a 32-bit variable, you will need to use sw instead of sd. For example, sw a2, 0(t0) stores the value of the a2 register at the word whose address is given by the t0 register. (This means that you would have to load the address of the variable into the t0 register with an lui/addi combo similar to what you would have used for loading the starting address of an array.) Also, it does not seem that sw allows you to have the first operand be in immediate mode, so you will need to load constants like 1 or 0 into a register (with li) before you write such values to result.
If you use the text box, note that pressing Tab will not create spaces, unfortunately. Please do not submit to both the text box and the file upload; pick one or the other. If you end up submitting a file multiple times, make it clear with a comment at the top of the file which one is the most recent submission, because it isn't clear on our end.
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Q13
For this problem, in the .data section, there is an array of 32-bit integers (called arr). Below is an example. It is always assumed that this array contains at least four integers.
arr:
.word 8
.word 3
.word -17
.word -6
.word 2
.word 10
.word 100
.word 30
Write RISC-V assembly code that prints out the sum of the first four elements in the array arr. If the array in the above example is used, then the sum should be -12. Provide any additional variables that you would need to add to the .data section.
Hint #1: To load an element from the array, you will need to use lw instead of ld, since each element of the array is the size of a word (i.e. 32 bits), not a doubleword.
If you use the text box, note that pressing Tab will not create spaces, unfortunately. Please do not submit to both the text box and the file upload; pick one or the other. If you end up submitting a file multiple times, make it clear with a comment at the top of the file which one is the most recent submission, because it isn't clear on our end.
|____| |files|
Q14
For this problem, in the .data section, there are an array of 32-bit integers (called arr) and the length of this array (called arrlen). Below is an example.
arr:
.word 18
.word 37
.word 29
.word 54
.word 60
arrlen:
.word 5
Write RISC-V assembly code that doubles each element in the array arr. If the array in the above example is used, then after your code is done, the elements of arr should be 36, 74, 58, 108, and 120. Provide any additional variables that you would need to add to the .data section.
Hint #1: To load an element from the array, you will need to use lw instead of ld, since each element of the array is the size of a word (i.e. 32 bits), not a doubleword.
Hint #2: To store an element in an array, you will need to use sw instead of sd, since each element of the array is the size of a word. For example, sw a2, 0(t0) stores the value of the a2 register at the word whose address is given by the t0 register.
If you use the text box, note that pressing Tab will not create spaces, unfortunately. Please do not submit to both the text box and the file upload; pick one or the other. If you end up submitting a file multiple times, make it clear with a comment at the top of the file which one is the most recent submission, because it isn't clear on our end.
|____| |files|
Q15
One of the characteristics of the RISC-V ISA that helps it facilitate pipelining is that it is a load- store architecture. Which of the following instructions should not be allowed in an ISA that very strictly follows the concept of a load-store architecture? Select all that apply. Whenever the word "operand" is used in the choices below, it means "register".
[ ] An instruction that pushes the operands' values onto the stack, changing the stack pointer in the process.
[ ] An instruction that triples the operand's value.
[ ] An instruction that rotates the bits in the operand.
[ ] An instruction that copies the contents of the memory location referenced by the first second operand to the memory location referenced by the second operand.
[ ] None of the above. (In other words, all of the above instruction could be allowed.)
Q16
In my free time, I like to sit in a basement and write programs that print out my favorite number. Suppose that I have calculated my favorite number (let's say it's 15) and placed it in the register x10. I then try the following code to print out my favorite integer.
.data
format_str:
.string "My favorite number is: %d\n"
.text
.globl main
main:
# ... calculate favorite number and place it in x10 ...
lui a0, %hi(format_str)
addi a0, a0, %lo(format_str) mv a1, x10
call printf
The above code results in garbage (e.g. "My favorite number is: 123440") being printed out instead of "My favorite number is: 15". Explain why 15 was not printed out and how the issue can be fixed.
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Q17
Name one RISC-like characteristic of the MiniCUSP assembly language. |____|
Q18
Due to a semi-significant typo, this question has been removed and will be free points.
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