CS计算机代考程序代写 assembly data structure c++ assembler cache Java jvm compiler Kristianstad University

Kristianstad University
DT131A: Embedded Systems Programming

Part I. C Programming

Q1. General Questions (7 points)
• In your opinion, what are the main differences between the Java and C programming languages? What are the advantages of the C language over Java, for Embedded Systems developers? (2p)

JAVA is Object-Oriented while C is procedural. Different Paradigms, that is. Most differences between the features of the two languages arise due to the use of different programming paradigms. C breaks down to functions while JAVA breaks down to Objects. C is more procedure-oriented while JAVA is data-oriented.

c is taken for an embedded system as it’s simple in terms of Code writing. Moreover, C have got Compiler which is supported on all Embedded system .C is Chosen as It’s High-Level Assembly language. Whereas C++ isn’t chosen because of the complexity it shows in case of Exception Handling. If U talk about Java it is some times Used like In mobile platforms Development but it’s not used in basic Systems as JVM which is needed for Compiling requires a lot of consumption of Memory

• In C programming, one of the uses of directives is conditional compilation.
Explain what is meant by conditional compilation;
Using an example C code of your own, show how conditional compilation is applied in C. (3p)

• What is the purpose of a function prototype? Using an example code, show how a function prototype is used in a C program. (2p)

Q2. Bitwise Operations (4 points)

Write the result of the following bitwise operations in hexadecimal. Assume the variables (a, b, c, d) are all of integer type.

The variables have the following values: a= 18, b=13, c= 2, d= 6.
Hint: convert the data to hexadecimal first.
It is necessary to show the steps of your computation details (not only the final results).
• (a << c) | ( a >> 2) | (b & ~b)
• (a + (b << 3)) << (d &c) C. (~(~b | b) & (a << c)) Q3. Data Structures (7 points) Write a C program that stores the following information about the vehicles belonging to a car dealer company in a data structure (struct). • Plate No. (6 characters) • Model (up to 15 characters) • Year (integer value) • Mileage (Kilometers driven, rounded to 1 decimal place) • Price (Value of the car, rounded to 2 decimal places) You can expect that the company has a maximum of 50 cars. Your program should: a) Allocate the necessary storage memory for the data (3p) b) Return the price of the 10th car (2p) c) The total price of all cars owned by the company (2p) You may assume that the information about the cars is read for you from a disk file using a function called readcardata( ) and stored in the memory you allocated. This function is already written for you (so, you don’t need to worry about it). Q4. Debugging C Programs (7 points) • Consider the 8-line C code given below. What should the statement in line No. 4 be so that the displayed output is x = 26 (when the printf statement in line 7 is executed, x=26 is printed on the screen.) Line No. Statement 1 #define A 5 2 #define B 3 3 #define C A + B 4 ?? 5 int x = C * D; 6 void main ( ) { 7 printf(“x = %d\n”, x); 8 } (3p) • Study the following program code carefully. int a, b; int *x; int i= 0; a = 5; b= 10; x = &a; while ( a > 0){ *(x + i) = 20 – i; a–; b++;
i++;
}
printf(“a = %d, \tb = %d”, a, b);

• How many times will the while-loop be executed?

• Write the exact text you expect to be printed on the screen by the printf
statement in the above code. (4p)

Part II. Embedded Systems
(Refer to the attached data sheets wherever needed) Q5. General Concepts (5 points)
• Explain the difference between Harvard and Von Neumann memory architectures.
Compare the fetch-execute cycle in both architectures to show their differences. (2p)
A von Neumann architecture has only one bus which is used for both data transfers and instruction fetches, and therefore data transfers and instruction fetches must be scheduled – they cannot be performed at the same time. It is possible to have two separate memory systems for a Harvard architecture

The fetch-execute cycle describes the way CPUs deal with data, and while it can seem complex at first, understanding the different stages is key to understanding one of the most fundamental parts of how a computer works.
• Explain the main advantages of dynamic memory (DRAM) compared to the static memory
(SRAM).
a static memory cell takes a lot more space on a chip than a dynamic memory cell. Therefore you get less memory per chip, and that makes static RAM a lot more expensive. It’s more Faster: Because SRAM does not need to refresh, it is typically faster (1.5p)
• Using examples, explain the differences between one-address and two-address machines with regards to CPU architectures. (1.5p)
Different cores run multiple threads. When there is always need to exchange data, the roots need different data to access the same memory address. When the core CORE0 wants to access the data of this address, it may have been loaded into the cache by the core Core2. It has been modified. Although it is theoretically possible for Core2 to synchronize the cached data to memory, CORE0 reads the data from the memory again, but the memory access speed is much slower than the CPU speed, which is generally the cache of Core2 directly accessed.

Q6. I/O Module of Microcontrollers
A typical I/O module of a computer can be described using the following diagram:

• As you can see in the diagram, an I/O module has three types of registers: data, status, control.
Demonstrate how these registers are used in the ADC of the Atmega328 microcontroller. What are the functions of each register type? You may use a C code or a pseudocode to explain your answer. If you use a C code, you should write proper comments to make your point clear and understandable. (3p)

Explain the concept of an interrupt and how it can be used in I/O.
Use the ADC case above as an example. It is not necessary to write a complete application code. However, your code should show how interrupts can be implemented on the microcontroller. (3p) interrupt I/O A way of controlling input/output activity in which a peripheral or terminal that needs to make or receive a data transfer sends a signal that causes a program interrupt to be set. … In a multilevel single-priority system there is a singleinterrupt signal line and a number of device identification lines.

Q7. Assembly Programming (6 points)
You are required to write an assembly program code for a weather station device. This device is to be based on the ATMega328 microcontroller. Your code displays the total amount of rainfall in a month, say March 2018. The total rainfall is the sum of the daily rainfall readings. Assume that:
• The daily rainfall data is already stored in consecutive memory as integer values.
• The starting memory address of the rainfall data is 0x1000 (e.g. March 1’s rainfall).
• The microcontroller has an 8-bit processor with 16MHZ speed
You should write an assembly program code that:
• Calculates the sum of the monthly rainfall data which is already stored in memory.
• Shows the calculated sum as binary on LEDs connected to one of the digital I/O ports.
• Write an assembler code with proper comments to do the required task. (3p)
• How much time does it take to complete the execution of the above program? Justify your answer by showing the necessary calculations. (2p)
• How much flash memory is required to store your compiled code? Justify your answer by showing the necessary calculations. (1p)
Note:
• Use a flow chart or relevant diagram in order to make your solution understandable.
• Show all necessary calculations you have made.
Q8. Microcontroller I/O Programming in C (8 points)
A factory wants to use a microcontroller to manufacture an alarm system used at Seniors Care Home. The system uses LED lamp lighting sequences and a PANIC button for signaling purposes as follows:
• When it is switched on (POWER ON), the GREEN and BLUE lamps blink for 3 seconds each one after the other.
• When the patient presses the PANIC button, only the RED lamp blinks for 2 seconds, then goes off for 1 seconds, and this sequence is repeated until the nurse arrives and takes care of the emergency situation.
Write a C program for this application. Use the following assumptions:
• You shall use the ATMega328P processor and assume it has a speed of 10MHZ – You shall use Timer0 to control the lighting interval. – You shall handle the PANIC situation appropriately.
Use a flow chart or relevant diagram in order to make your solution understandable.
Write proper comments to describe your code.
Note: Th of points you earn depends on clarity and accuracy of your solution.
int ledpin=11;//定义数字11 接口
int inpin=7;//定义数字7 接口
int val;//定义变量val
void setup()
{
pinMode(ledpin,OUTPUT);//定义小灯接口为输出接口
pinMode(inpin,INPUT);//定义按键接口为输入接口
}
void loop()
{
val=digitalRead(inpin);//读取数字7 口电平值赋给val
if(val==HIGH)   {  //检测按键是否按下
   
     int a=a+1;
     }
   
    if(a=4) { a=1;}

    if ( a=1 ) {digitalWrite(ledpin,HIGH);}

    if ( a=2 ) {
               digitalWrite(ledPin, HIGH); //点亮小灯
               delay(1000); //延时1 秒
               digitalWrite(ledPin, LOW); //熄灭小灯
               delay(1000); // 延时1 秒
               }

    if ( a=3 ) {digitalWrite(ledpin,LOW);}
     
}

1. Interrupt Address table

2. Timer Initialization Information

• TCNT0: Timer/Counter an 8-bit register, stores the current value of Timer0.
• TCCR0: Timer/Counter Control Registers, configures the operations of Timer0.
• OCRxA, OCRxB: Output Compare Registers store the preset values for output compare.
• TIMSK enables timer interrupts
• TIFR monitors status of timer interrupts.

TCR0 (Timer 0)
CS2:0 (clock select prescaler)
000 None
001 clkI/0
010 clkI/0/8
011 clkI/0/64
• clkI/0/8clkI/0/256
• clkI/0/8clkI/0/1024
• External clock on T0 (falling edge trigger)
• External clock on T1 (rising edge trigger) Waveform generation mode (WGM)
00 Normal
10 PWM, Phase Correct
01 CTC 11 Fast PWM
• TIMSK Timer 0 uses the Timer/Counter 0 Output CompareMatch Interrupt Enable (OCIE0) bit and the Timer/Counter 0 Overflow Interrupt Enable (TOIE0) bit.
OCIE0 (=1): Compare Match interrupt is enabled if the I-bit in the Status Register is set (=1) TOIE0 (=1): Overflow interrupt is enabled if the I-bit in the Status Register is set (=1).
• TIFR Timer 0 uses
• the OCF0 bit position, (sets for an output compare match).
• the TOV0 bit position, (sets when Timer/Counter 0 Overflows).

3. ADC Initialization Information

Input Channel Selections
0000 ADC0
0001 ADC1
0010 ADC2
0011 ADC3
0100 ADC4
0101 ADC5
0110 ADC6
011 1 ADC7

ADC Prescaler Selections

ADPS2 ADPS1 ADPS0 Division Factor
0 0 0 2
0 0 1 2
0 1 0 4
• 1 1 8
• 0 0 16
1 0 1 32
1 1 0 64
1 1 1 128

4. ATMega168/328 Instruction Set

ATMega168/328 Instruction Set (cont’d)