DT131B
Embedded Systems Programming
Lecture 2: Introduction to Computer Organization and Architecture
Slides Adapted from: Computer Organization and Architecture William Stallings, 8th Edition (2010)
Dawit Mengistu (dawit.mengistu@hkr.se)
Architecture & Organization
• Architecture is those attributes visible to the programmer
– Instruction set, number of bits used for data representation, I/O mechanisms, addressing techniques.
– e.g. Is there a multiply instruction?
• Organization is how features are implemented
– Control signals, interfaces, memory technology.
– e.g. Is there a hardware multiply unit or is it done by repeated addition?
Architecture & Org’ (cont’)
• AllIntelx86familyprocessorssharethesamebasic architecture but may have different organization
• Organizationdiffersbetweendifferentversions – Memory technologies
– CPU structure
– Address and data units, etc.
• Similarityanarchitecturecansupportcode compatibility
– At least backwards
Functions
All computer functions are:
• Data processing • Data storage
• Data movement • Control
Functional View
Peripherals
Top Level View
Computer
Central Processing Unit
Main Memory
Computer
Systems Interconnection
Input Output
Communication lines
Structure of the Computer
CPU
Computer
I/O
System CPU Bus
Memory
Registers
Arithmetic and
Login Unit
Internal CPU Interconnection
Control Unit
Structure – The CPU
CPU
Internal Control Bus Unit
Registers
Control Unit
Sequencing Logic
Control Unit Registers and Decoders
Control Memory
ALU
Structure – The Control Unit
Components of a Computer
• The ALU, Registers and Control Unit constitute the Central Processing Unit
• Data and instructions need to get into the system and results out
– Input/output
• Temporary storage of code and results is
needed
– Main memory
Computer Components: (cont’)
The Instruction Cycle
Two steps:
• Fetch
• Execute
Fetch What?
• Instruction(Opcode) • Data(operand)
Fetch Cycle
• Program Counter (PC) holds address of next instruction to fetch
• Processor fetches instruction from memory location pointed to by PC
• Increment PC
– Unless told otherwise
• Instruction loaded into Instruction Register (IR)
• Processor interprets instruction and performs required actions
Execute Cycle
• Processor-memory
– data transfer between CPU and main memory
• Processor I/O
– Data transfer between CPU and I/O module
• Data processing
– Some arithmetic or logical operation on data
• Control
– Alteration of sequence of operations – e.g. jump
• Combination of above
Example of Program Execution
• Load • Add • Store
Instruction Cycle State Diagram
Computer Modules
Bus Interconnection Scheme
The Bus
• Acommunicationpathwayconnectingtwoormore devices
• Usuallybroadcast
• Oftengrouped
– A number of channels in one bus
– e.g. 32 bit data bus is 32 separate single bit channels
• Thereareanumberofpossibleinterconnection systems
• Single and multiple BUS structures are most common – e.g. Control/Address/Data bus (PC)
– e.g. Unibus (DEC-PDP)
The Data Bus
• Carries data
– Remember that there is no difference between
“data” and “instruction” at this level
• Width is a key determinant of performance – 8, 16, 32, 64 bit
The Address bus
• Identify the source or destination of data
• e.g. CPU needs to read an instruction (data)
from a given location in memory
• Bus width determines maximum memory capacity of system
– e.g. 8080 has 16 bit address bus giving 64k address space
The Control Bus
• Control and timing information
• Consists of
– Memory read/write signals – Interrupt request
– Clock signals