CS代写 1007ICT / 1807ICT / 7611ICT Computer Systems & Networks

1007ICT / 1807ICT / 7611ICT Computer Systems & Networks
3A. Digital Logic and Digital Circuits

Last Section: Data Representation

Topics Covered:
 Representing binary integers
 Conversion from binary to decimal
 Hexadecimal and octal representations
 Binary number operations
 One’s complement and two’s complement
 Representing characters, images and audio

Lecture Content
 Learningobjectives
 Digitallogic,Basiclogicgates,Booleanalgebra  Combinatoriallogicgates
© . Revised and updated by , , and Wee Lum 3

Learning Objectives
At the end of this lecture you will have:
 Gained an understanding of basic logic gates
 Learnt the truth tables associated with the basic logic gates
 Gained an understanding of combinatorial logic gates
 Learnt the truth tables associated with combinatorial logic gates
© . Revised and updated by , , and Wee Lum 4

Digital Logic (Section 2.2)
All digital computers are built from a set of low
Logic Gates.
level digital logic switches or
Gates operate on binary signals that only have one of two values:
 Signalsfrom0to2voltsisusedtorepresentabinary0(OFF)  Signalsfrom3to5voltsisusedtorepresentabinary1(ON)  Signals between 2 and 3 volts represent an invalid state
Three basic logic functions that can be applied to binary signals:
More complex functions can be built from these three basic gates
 AND:  OR:  NOT:
outputtrueifALLinputsaretrue outputtrueifANYinputistrue outputistheinverseoftheinput
© . Revised and updated by , , and Wee Lum 5

Basic Logic Gates (Section 2.4)
Boolean expression
Truth Table
x = a AND b
x = a OR b
© . Revised and updated by , , and Wee Lum 6

Boolean Algebra
There is a basic set of rules about combining simple binary functions.
x OR 0 = x x OR 1 = 1 x OR x = x x OR x = 1 (x)=x
xAND0 = 0 xAND1 = x xANDx = x xANDx = 0
© . Revised and updated by , , and Wee Lum 7

Combinatorial Logic Gates
Next Slide
Symbol Equivalent
Boolean expression
Truth Table
© . Revised and updated by , , and Wee Lum 8
x = a AND b x = a OR b x = a XOR b

Boolean Algebra – 2
 This second set of rules are more powerful. OR – form AND – form
(xORy) = xANDy
(xANDy) = xORy
OR – form AND – form
NAND = Theorem
DeMorgan’s
© . Revised and updated by , , and Wee Lum 9

The eXclusive-OR Gate (XOR)
Looking at the truth table we see that the XOR function can be described as:
 x = (aANDb)OR(aANDb)  x=aXORb
 This function can be built in 3 ways: Demorgan’s Theorem
aaa bbb aaa bbb
x = (aANDb)OR(aANDb) x = (aANDb)OR (aANDb) x = (aANDb)AND(aANDb)
© . Revised and updated by , , and Wee Lum 10

Logic Unit
Let’s try to create a “programmable” logic unit that permits us to apply a predefined logic function to a given set of inputs.
Output Select
We need a function that lets us select what operation to perform
AND OR XOR
© . Revised and updated by , , and Wee Lum 12

Have considered:
 Operation of basic logic gates
 Combinatorial logic gates, Truth tables
© . Revised and updated by , , and Wee Lum 13

 Logic unit, Selection logic, Decoder logic
 Multiplexing and demultiplexing
© . Revised and updated by , , and Wee Lum 14

1007ICT / 1807ICT / 7611ICT Computer Systems & Networks
3B. Digital Logic and Digital Circuits

Last Lecture:
Topics Covered:
• Digital logic, Basic logic gates, Boolean algebra
• Combinatorial logic gates

Lecture Content
 Learning objectives
 Logic unit, Selection logic, Decoder logic  Multiplexing and demultiplexing
 Half and Full adders
© . Revised and updated by , , and Wee Lum 3

Learning Objectives
At the end of this lecture you will have gained an understanding of:
 Selection logic
 Decoder logic
 Multiplexors
 Demultiplexors
 Half and Full adders
© . Revised and updated by , , and Wee Lum 4

Logic Unit
Lets try to create a “programmable” logic unit that permits us to apply a predefined logic function to a given set of inputs.
Output Select
We need a function that lets us select what operation to perform
AND OR XOR
© . Revised and updated by , , and Wee Lum 5

Selection Logic
 Saywehaveanumberofinputs‘A,B,C,D’andwe want to select one of them to use in a logic function.
 Weneedaspecialfunctiontoswitchtheselected input into the output ‘X’ based on the selection.
 WecanuseinputsS0toS3toselectbetweenA-D
S0 S1 S2 S3
© . Revised and updated by , , and Wee Lum 6

Decoder Logic
 Justsaywewanttoselectbetweenoneof100’s of possible inputs – we need 100’s of selection inputs as well which gets too complicated.
 DecoderswithNinputsallowustoenableany one of 2N possible selection lines.
 Basicallyadecodertakesabinarycodednumber and enables the output representing the number
2 to 4 Decoder
x0 = s1ANDs2 x1 = s1ANDs2 x2 = s1ANDs2 x3 = s1ANDs2
2N outputs
© . Revised and updated by , , and Wee Lum 7

Multiplexing
 Combiningtheselectoranddecoderwecan
create what is called a
 IngeneralifwehaveNinputswewanttoswitch between we need to have log2(N) selection lines.
Multiplexor
S0 S1 selection
© . Revised and updated by , , and Wee Lum 8

Demultiplexing
We can also switch in the opposite direction to send one input ‘A’ into one of many different outputs (eg X1..Xn)
Input X1 A X2
outputs X4
(s0,s1) Select
S0 S1 selection
© . Revised and updated by , , and Wee Lum 9

Half-Adders
In addition to logic functions we can also create maths functions.
The simplest math function is the half-adder which can add 2 digits (bits) to give a sum and a carry bit
0011A 0 1 0 1B+ 0 1 1 10
Sum = A XOR B Carry = A AND B
© . Revised and updated by , , and Wee Lum 10

Full-Adders
 Ifwewanttoaddmorethan1bitvaluestogether we need to deal with the carry.
 Full-addersacceptthetwoinputstobeaddedplus the carry from a previous stage.
 Thecircuitmustbeabletodealwithpropagation delays
00 00 01 01 00 10 11 11A 00 01 00 01 10 01 10 11B+ 00 01 01 10 10 11 101 110
A0 B0 A1 B1 A2 B2 A3 B3
Full Adder
Full Adder
Full Adder
Full Adder

S0 S1 4 bit adder S2 S3 © . Revised and updated by , , and Wee Lum -Adders
The logic to perform add with carry combines two half adders together.
Sum =AXORBXOR = (AANDB)OR(CinAND(AXORB))
© . Revised and updated by , , and Wee Lum 12

Subtraction
 A–BisthesameasA+(-B)
 IfweconvertBtothenegativeequivalentofits value, we can use the basic adder as it is. We can use an XOR gate to do this.
 However,convertingBto–Busingtwo’s complement also requires adding 1
A B0 Sign bit 0
+0 if positive +1 if negative
Full Adder
© . Revised and updated by , , and Wee Lum 13

Have considered:  Selection logic  Decoder logic
 Multiplexors
 Demultiplexors
 Half and Full adders
© . Revised and updated by , , and Wee Lum 14

 Arithmetic logic unit
 Binary multiplication and division
 Shifting
 Sequential Logic
 Data latches, S-R Latch
 Clocks and synchronisation
 Registers, Buses, Computer memory  Processors and Memory Organisation
© . Revised and updated by , , and Wee Lum 15

程序代写 CS代考加微信: powcoder QQ: 1823890830 Email: powcoder@163.com

Related Posts