Abstraction & Digital Logic: From Transistors to Gates
Four-Way Multiplexer
n-bit selector and 2n inputs, one output
output equals one of the inputs, depending on
selector
“Four-to-one mux”
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Two-to-Four Decoder
n inputs, 2n outputs
exactly one output is 1 for each possible input pattern
Uses:
Convert memory or register address to a control line
Convert an opcode to one of n control lines
We will get to this in the MIPS material
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Two-to-Four Decoder
n inputs, 2n outputs
exactly one output is 1 for each possible input pattern
Uses:
Convert memory or register address to a control line
Convert an opcode to one of n control lines
We will get to this in the MIPS material
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Time for some…
We currently use decimal system in daily life
(deci=10 digits,0-9)
We know..
1+0=1 1+1=2;1+2=3;1+3=4… 1+8=9;
What is 1+9=?? CSE12 Winter 2021
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Intro to Addition in Binary Base
010+110=110
110+110 =210
110 + 210 = 310
02+12=12 12+12=102
112+12 =1002
…..
110 + 910 = 1010
…..
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Binary Addition and Half-Adder
02 + 02 = 02
02 + 12 = 12
12 + 02 = 12
12 +12 =102
…
A half-adder can add 2 bits and produces a sum and carry signal
Sum = A xor B Carry = AB
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One-Bit Full Adder
A B Cin Cout S
000 001 010
011 100 101 110 111
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Four-Bit Full Adder
Ripple-carry adder
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Masking
Want to look only at certain bits of a binary word
Use a mask to remove the uninteresting bits
Example:
Two values: 01001101 and 01001001
If we want to see bit 3 from right, we AND it with 00000100 to get
00000100 and 00000000, respectively.
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Logic Minimization
ABC
000
001
010
011
100
101
110
111
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0
0
1
1
1
0
1
0
Start with SOP:
A’BC’ + A’BC + AB’C’ + ABC’
Factor A’ and A out:
A’(BC’ + BC) + A(B’C’ + BC’)
Factor B and C’ out:
A’(B(C’ + C)) + A(C’(B’ + B))
Use identity that C’+C=1 and B’+B=1: A’B + AC’
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Motivation between logic minimization
Original form: Simplified form:
A’BC’ + A’BC + AB’C’ + ABC’
A’B + AC’
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Wave Diagram concept
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Building functions from logic gates
Combinational Logic Circuit
Output depends only on the current inputs Stateless (memoryless)
Sequential Logic Circuit
Output depends on the sequence of inputs (past
and present)
Stores information (state) from past inputs
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Sequential Circuits and Memory
Combinational vs. Sequential
■ Combinational circuit
◆ Always gives the same output for a given set of
■ Sequential circuit
◆ Remembers previous input
◆ Output depends on state and input
inputs
◆ Example: Adder always generates sum and carry, regardless of previous inputs
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Sequential Circuits
■ Store information
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Reset-Set (RS) Latch – NAND SR Latch
■ Two inputs: Set and Reset
■ Setto0oneofthetwoinputsatatimetostore
a value, S sets, R clears
■ The transition to 00 generates an undefined output
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NAND SR Latch
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R-S Latch Nor Gates
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