CS计算机代考程序代写 Java assembly python interpreter GPU x86 javascript compiler FIT1047 – Week 4

FIT1047 – Week 4
Part 2:
I/O and Interrupts
Reference: https://www.alexandriarepository.org/syllabus/introduction-to-computer-systems-networks-and-security/

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Recap
We’ve now seen
● CPUs
● Memory
There’s one component missing to complete the picture:
Input and Output

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Overview
Computers are useless without input/output. Today:
● How does the CPU communicate with I/O devices?
● How does it handle time critical I/O?

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Early I/O
The first computers had very limited I/O.
● Punched paper tape or cards ( Also called Hollerith cards, IBM cards or paper cards)
● Teleprinters
Teletype with papertape punch and reader
Image source: Wikipedia
https://simple.wikipedia.org/wiki/Punched_tape https://commons.wikimedia.org/wiki/File:Teletype_with_pape rtape_punch_and_reader.jpg

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Modern I/O
● Keyboard, mouse, touch pad, touch screen, voice control, gestures, accelerometers, barometers, GPS, …
● Screens, printers, audio, smart home appliances, robots, … Also classed as I/O:
● Storage (hard disks, SSDs, SD cards)
● Network devices (WiFi, 4G, Ethernet)

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Modern I/O interfaces
I/O devices are now usually connected via interfaces:
● Standardised connectors and protocols
● Can be internal or external Examples: USB, PCIe, HDMI, …
https://en.wikipedia.org/wiki/PCI_Express

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I/O and the CPU
The CPU needs to be able to
● Receive data from an I/O device
● Send data to an I/O device
Why send to input devices?
● E.g. set sensitivity, calibrate, switch on/off, …
Why receive from output devices?
● E.g. check if ready, check if successful, …

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I/O and the CPU
I/O devices have their own registers.
E.g. keyboard device: register holds the currently pressed key How can we access these registers in machine code?
Two methods:
● memory-mapped and ● instruction-based I/O.

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I/O Access Method 1: Memory-mapped
Each I/O register is “mapped” to a special memory address. We can then use
Load/Store.
Example: keyboard register is mapped to address A000.
● Load A000 loads currently pressed key into AC register. Example: printer register is mapped to address A100.
● Store A100 stores current AC value in printer register (which then gets printed out).

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I/O Access Method 1: Memory-mapped Advantages:
● No need for new instructions ● Simple
Disadvantages:
● We cannot use “mapped” addresses for memory any more
● The overall amount of usable memory is reduced (because some addresses
are now unavailable)
● Programs may accidentally access I/O (when a program has a bug)

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I/O Access Method 2: Instruction-based
● Add special I/O instructions to CPU ISA. For example, Input and Output.
● Each I/O register still has an address (as in memory-mapped I/O).
● But now these addresses are separate from the memory. Example:
 Load A000 loads value from memory address A000
 Input A000 loads value from I/O register A000 (e.g. the keyboard)

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When to perform I/O
Now we know how to communicate with I/O devices.
But most I/O devices are much, much slower than the CPU. So when should the CPU communicate with the device?
● How does it know that a key has been pressed?
● How does it know a printer is ready for receiving the next character? ●…
Two methods: programmed and interrupt-based I/O.

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Programmed I/O
Programmer adds checks into code to periodically checks I/O registers. Also called polling I/O.
Pseudocode:
while (true) {
if (keyboardRegister.canRead()) {
processKeyboardRegister();
} else if (printerRegister.canWrite()) {
processPrinterRegister();
}
}

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Programmed I/O
Advantages:
● Very simple (no extra hardware needed)
● Programmer can decide how often to poll
(e.g. 10000 times/second for network, 10 times/second for keyboard) Disadvantages:
● Programmer must be careful (poll registers regularly)
● Program is “I/O driven” (constructed around I/O)
● CPU is constantly in “busy loop”, causing high power usage
Programmed I/O is mostly used in embedded special-purpose systems.

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Interrupts
Opposite of polling:
● CPU is notified when it should communicate with I/O device
● CPU interrupts current program, executes special interrupt handler code,
then continues normal program
● Programmer can write separate code for main program and interrupt handler
(better separation of concerns)

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Interrupt signals
Device notifies CPU of pending interrupt by setting a bit in a special register. CPU checks before each fetch-decode-execute cycle:
● Is interrupt bit set? Call interrupt handler.
● Otherwise: normal fetch-decode-execute.
Let’s look at the RTL for this.

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RTL for Fetch with Interrupts
An interrupt handler is like a subroutine:
● Use JnS to
○ Store the return address
○ Jump to the code implementing the handler
● When the handler finishes, return to caller using JumpI RTL for JnS X:
• MBR←PC
• M[MAR] ← MBR
• PC←MAR
• PC←PC+1
Save current PC at X Jump to X+1

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RTL for Fetch with Interrupts
1. If InterruptBit is 1:
a. Clear InterruptBit
b. MAR ← InterruptHandler
c. MBR←PC
d. M[MAR] ← MBR
e. PC←MAR
f. PC←PC+1
2. MAR←PC
3. MBR ← M[MAR]
4. IR←MBR
5. PC ← PC+1
6. …
Normal fetch cycle
Save current PC at InterruptHandler Jump to InterruptHandler+1

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Interrupt Handler
Must leave the CPU in the same state as before the interrupt! ● For MARIE: Contents of AC must be the same as before
This is called a context switch. It can be achieved by
● Shadow registers:
When an interrupt happens, the CPU switches to a separate register file
Or
● In Programming the interrupt handler to save registers to memory (see next example)

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Interrupt Vectors
How can the interrupt handler distinguish interrupts from different devices?
● Each device is assigned an identification number
● When raising an interrupt, the device stores its number in a special register
● The interrupt handler uses that number to jump to different subroutines
● The list of subroutines (one per device) is called an interrupt vector

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Example Interrupt Handler (MARIE syntax)
InterruptHandler, HEX 0
Store SaveAC
Save AC register to memory
SaveAC,
Destination,
InterruptVecAddr,
InterruptVec,
Load InterruptVecAddr
Add InterruptDeviceID
Store Destination
JumpI Destination
HEX 0
HEX 0
ADR InterruptVec
ADR KeyboardHandler
ADR MouseHandler
ADR PrinterHandler
ADR SoundHandler
Add device number to address of interrupt vector
Jump to device handler
/ Temporary storage for AC register
/ Computed
/ device 0
/ device 1
/ device 2
/ device 3
destination handler
KeyboardHandler, … / do some work Load SaveAC
JumpI InterruptHandler
Restore AC register from memory Return to normal program

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Interrupts in x86 PCs
Original design:
● 15 interrupt request (IRQ) signals
● hardware must be configured to use
correct IRQ
● Results in conflicts
● e.g. setting jumper on a network or sound card
● devices have to share IRQs

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Interrupts in x86 PCs
https://en.wikipedia.org/wiki/Sound_card

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Modern Interrupts
Use Advanced Programmable Interrupt Controllers (APICs).
● Integrated into CPUs
● Support more IRQs (results in fewer
conflicts)
● Include high-resolution timers
○ E.g. cause an interrupt every millisecond
○ We will see later why that’s useful!

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Disadvantages of interrupt-based I/O
● Different devices may need different priorities
○ E.g. keyboard (very low) vs graphics card (very high priority)
○ Can be achieved using different interrupt signals
● All memory transfers run through the CPU
○ E.g. read byte from disk, store into memory; or
○ Read byte from memory, transfer to graphics card
● I/O devices are fully controlled by CPU Solution: DMA

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Comparison Chart
Operations
Interrupt
Polling
Basic operation
Device notify CPU that it needs CPU attention.
CPU constantly checks device status whether it needs CPU’s attention.
Mechanism
An interrupt is a hardware mechanism.
Polling is a Protocol.(software)
Servicing
Interrupt handler services the Device.
CPU services the device.
Identification
Interrupt-request(IRQ’s) line indicates that device needs servicing.
Command-ready bit indicates the device needs servicing.
CPU response
CPU is interrupted only when a device needs servicing through IRQ, which saves CPU cycles.
CPU has to wait and check whether a device needs servicing which wastes lots of CPU cycles.
Events
An interrupt can occur at any time.
CPU polls the devices at regular interval.
Efficiency
Interrupt becomes inefficient when devices keep on interrupting the CPU repeatedly.
Polling becomes inefficient when CPU rarely finds a device ready for service.
An Analogy
When door bell rings(IRQ request), then we check the door to see who has arrived.
In Polling, we constantly open the door to check if someone has arrived.

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Direct Memory Access (DMA)
Modern CPUs can delegate memory transfer to dedicated controller.
● Hard disk controller can transfer data directly to RAM
● Graphics card can fetch image directly from RAM
● CPU is free to perform other tasks
CPU and DMA controller share the data and address bus:
● Only one can perform memory transfer at the same time

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Summary
I/O
● Memory-mapped vs. instruction based
● Programmed (polling) vs interrupt-driven
Interrupts
● Require context switch (call subroutine to handle interrupt, save registers)
● Jump into interrupt vector (one handler per device)
DMA
● Off-load responsibility for data transfer to special controller
● Keeps CPU free to do useful tasks

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Outlook
Next lecture:
● Booting a computer
● BIOS / UEFI
● BIOS (Basic Input-Output system), Intel has announced plans to completely replace it with
UEFI(Unified Extended Firmware Interface Forum) by 2020.
https://en.wikipedia.org/wiki/BIOS
https://www.howtogeek.com/56958/htg-explains-how-uefi-will-replace- the-bios/

FIT1047 – Week 5
Part 1:
Overview
 Look at CPUs in context
 Components on a PCs motherboard
Part 2:
Overview
 PC boot sequence
 BIOS / UEFI
 Assignment 1 discussion

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32-bit CPU means a word is 32-bit long:-
 Registers are 32-bit
 Load 32-bit in one step
 Use up to 32-bit for addresses
 Address up to 232 locations
(for Byte-addressing this is 4GB)

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Note that our toy CPU MARIE :
• Architecture has 16-bit words.
• But, it only uses 12 bits for
addressing. IT can address 212 memory locations with 16-bits in each location.
• Thus, it can address 212 x 2 Bytes.
• This is = 8192 Bytes

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Most current CPU’s today uses 32-bit or 64-bit Architecture

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Readable Representation: Assembly Language
Machine Language Opcodes (just 0’s & 1’s) = Machine code

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Higher Programming Languages: Python, C, C++, Java, JavaScript’s, etc…
Need to be transferred/transformed to the CPU’s Instruction Set Architecture(ISA) via (Compilers, Interpreters or combinations)
.

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Higher Programming Languages: Python, C, C++, Java, JavaScript’s, etc…
Executable Code only runs on the target Architecture with the right Instruction set.

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How are Instructions implemented in the CPU?
Readable Representation: Assembly Language
Machine Language Opcodes (just 0’s & 1’s) = Machine code
Input
Store X
Input
Store Y
Add X
Output
Halt
X, DEC 0
Y, DEC 0
Assembled into Opcodes and Memory Addresses

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How are Instructions implemented in the CPU?
 One Instructions needs several Clock cycles
 CPU works mainly on data that’s found in registers
 Register Transfer Language (RTL) is used to define what needs to be done inside CPU
 Fetch-Decode-Execute cycle
 CPU contains lots of circuits doing the tasks like Arithmetic(Adders), data movements
(registers, decoders, Multiplexers etc..)

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How are Instructions implemented in the CPU?
CPU Clock
Frequency of 4 GHz: 4,000,000,000 ticks per second.

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Components on a PCs motherboard?

In Intel and AMD chip-sets the Northbridge is the chip whose main role is to connect (provide a bridge between)
 The CPU and the RAM memory.
 The CPU to the AGP and PCI Express slots.
The Southbridge is more relaxed and connects the CPU via the Northbridge to the I/O devices.

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Components on a PCs motherboard?
• A front-side bus (FSB) is a computer communication interface (bus) that was often used in Intel-chip-based computers.
• The FSB typically carry data between the central processing unit (CPU) and a memory controller hub, known as the north-bridge.

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Components on a PCs motherboard?
• The FSB connects the computer’s processor to the system memory (RAM) and other components on the motherboard.
• These components include the system chipset, AGP card, PCI devices, and other peripherals

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Components on a PCs motherboard?
• The FSB connects the computer’s processor to the system memory (RAM) and other components on the motherboard.
• These components include the system chipset, AGP card, PCI devices, and other peripherals

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Components on a PCs motherboard?

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Components on a PCs motherboard?
• Northbridge is the chip whose main role is to connect (provide a bridge between) the CPU and the RAM memory. It also connects the CPU to the AGP and PCI Express slots.
• Southbridge is more relaxed and connects the CPU via the Northbridge to the I/O devices.
• LPC Bus (Low Pin Count), or LPC bus, is a computer bus used on IBM-compatible personal computers to connect low-bandwidth devices to the CPU, such as the boot ROM-BIOS, “legacy” I/O devices, and Trusted Platform Module.

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Components on a PCs motherboard?
• An Intel chipset is a computer component housed on motherboards compatible with Intel brand processors.
• Thechipsetconsistsof two chips, the northbridge and the southbridge, that control communication between the processor, memory, peripherals and other components attached to the motherboard.

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Components on a PCs motherboard?


 
In Intel and AMD chip-sets the Northbridge is the chip whose main role is to connect (provide a bridge between)
The CPU and the RAM memory.
The CPU to the AGP and PCI Express slots.
The Southbridge is more relaxed and connects the CPU via the Northbridge to the I/O devices.
A front-side bus (FSB) is a computer communication interface (bus) that was often used in Intel-chip-based computers. The FSB typically carry data between the central processing unit (CPU) and a memory controller hub, known as the north-bridge.
The original front-side bus (FSB) has been replaced by HyperTransport, Intel QuickPath Interconnect or Direct Media Interface in modern volume CPUs.
LPC Bus (Low Pin Count), or LPC bus, is a computer bus used on IBM-compatible personal computers to connect low-bandwidth devices to the CPU, such as the boot ROM, “legacy” I/O devices, and Trusted Platform Module.
https://en.wikipedia.org/wiki/Northbridge_(computing)

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Motherboards:
● Link: http://www.computerhope.com/jargon/n/northbri.htm
● Contains a description and image of an ASUS motherboard from around 2005
Modern PCs:
● Northbridge mostly integrated into CPU
 faster, more control by CPU manufacturer
 often contains GPU as well
● Rest done by Southbridge
Motherboards:
https://www.ifixit.com/Teardown/Retina+MacBook+2016+Teardown/62149
(teardown of 2016 Apple MacBook)

AMK1
FIT10
47 Monash University
System-on-Chip (SoC)
Integrate multiple components on a single chip:
● Processor
● Memory controller
● GPU
● RAM
● I/O interfaces
● Network
System-on-Chip (SoC)
Integrate multiple components on a single chip:
● low power consumption
● small form factor
● simplified motherboard layout
Used for smartphones, tablets, Raspberry Pi, etc.
Source: https://en.wikipedia.org/wiki/Raspberry_Pi

Slide 49 AMK1
Dr. Malik Khan, 02-April-2019

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Raspberry Pi
Complete computer based on SoC for around $35 https://upload.wikimedia.org/wikipedia/commons/b/b4/Raspberry_Pi_3_Model_B.png (the second chip in the picture is an Ethernet network adapter)

FIT1047 – Week 5
Part 2:
Overview
 PC boot sequence
 BIOS / UEFI
 Assignment 1 discussion
Ref: https://www.alexandriarepository.org/syllabus/introduction-to- computer-systems-networks-and-security/

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BOOT Process: Turn Power “ON”
• Power supply starts and provides energy to the Motherboard and other components in the computer. Components should only really start to work after a stable power level is established.
• A power good signal can be sent to the Motherboard which triggers the timer chip to reset the processor and starts the clock ticks.

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BOOT Process: Turn Power “ON”
• Power supply starts and provides energy to the Motherboard and other components in the computer. Components should only really start to work after a stable power level is established.
• A power good signal can be sent to the Motherboard which triggers the timer chip to reset the processor and starts the clock ticks.

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BOOT Process: Processor Starts
• First the main Computer fan starts (or other cooling system) and Motherboard clock-cycle starts.
• CPU get the power and starts working.
• CPU cannot do much with the software
• When a computer starts it is really not able to do much. The CPU does not know about the hard-disk an O.S might sit on or any other peripherals connected to the computer (mouse, Keyboard, Monitor, other hardware, DVD-drive, printer etc…)
• Booting means to load the software step-by-step and activate all components one step after the other.

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Boot process: Initial software !
 BIOS (Basic Input Output System) or first steps of UEFI (Unified Extensible Firmware Interface) in modern PCs is stored in non-volatile memory (ROM – read only memory) on the motherboard.
 It controls the start-up steps, provides initial system configuration (power saving, security, etc.), and initially configures accessible hardware
 The reset command in the CPU triggers the execution of an instruction at a specific location in the BIOS/UEFI chip
 Location contains a Jump Instruction that points to the actual BIOS start-up program in the chip
 Booting really starts with the execution of this start-up program in BIOS

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Boot process: Power On Self Test – POST !
 Location contains a Jump Instruction that points
to the actual BIOS start-up program in the chip
 Booting really starts with the execution of this start-up program in BIOS
 BIOS starts with a power-on-self-test (POST)
 System memory is OK
 System clock / Timer is running
 Processor(CPU) is OK
 RAM is checked
 Video card is checked
 Keyboard, then mouse is checked
 Screen display memory is checked
 BIOS is not corrupted
Results of POST can only be communicated through system beep.

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Boot process:
Video Card check!
 The first thing after a successful POST is to initialise the Video Card and show the initial messages on the screen.
 Note that the BIOS can only do a rudimentary initialization. Use of 3D cards or other special gaming graphics..etc.; needs additional device driver software. The so called drivers are specific to the cards functionality.
Other Hardware check!
 Then, the BIOS goes through all available hardware and initialize as far as possible without more complex driver software (UEFI has more options)
 Examples are type and size of Hard-Disk, DVD drive, timing of RAM (Random Access Memory) chips, Networking cards, sound cards etc…

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Boot process: Find the location of O.S (Operating System)
Finding O.S!
 BIOS needs to look for the Bootable Drive.
 The Bootable Drive can be on a Hard-Disk, USB
stick, CD, DVD, Floppy disk etc….
 Order of boot can be pre-defined in BIOS configuration (Usually accessible by holding a particular key while start-up screen is shown)
 BIOS Keys are different to different system manufacturers. The F1, F2, F11, or F12 key should get you into the BIOS. Other hardware might require the key combination Ctrl + Alt + F3 or Ctrl + Alt + Insert key or Ctrl + Alt + del, or Fn + F1….etc..
 The MBR is always found at cylinder-0, Head-0, Sector-1 or (0.0.1)

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Boot process: Boot sector on bootable Hard Disk! Finding O.S on Hard Disk!
 On a bootable Hard-drive, there needs to be a boot sector with code to be executed (boot loader).
 On a hard disk, this information is in the Master Boot Record (MBR).
 The boot loader first loads the core part of the operating system, the kernel. Then it loads various device drivers (e.g. for the graphics card).
 Once all drivers are loaded, the Graphical User interface is started and personal settings are loaded.
The computer is now ready to use.

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Boot process: Role of Memory – RAM! Loading O.S Kernel, Programs & User
space!
 During the Booting starts up a computer, the computer is relatively dumb and can read only part of its storage called read-only memory (ROM). There, a small program is stored called firmware BIOS. It does power-on self-tests and, most importantly, allows accessing other types of memory like a hard disk pagefile and main memory.
 The firmware loads O.S & programs into the computer’s main memory and runs it. Afterwards, the kernel runs so-called user space software – well known is the graphical user interface (GUI), which lets the user log in to the computer or run some other applications.
 The whole process may take few seconds to tenths of seconds on modern general purpose computers.

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Boot process: Trusted Platform Module (TPM)
 A Trusted Platform Module (TMP) is a specialized chip on an endpoint device that stores RSA encryption keys specific to the host system for hardware authentication.
 Each TPM chip contains an RSA key pair called the Endorsement Key (EK). The pair is maintained inside the chip and cannot be accessed by software.
 The Storage Root Key (SRK) is created when a user or administrator takes ownership of the system.
 This key pair is generated by the TPM based on the Endorsement Key and an owner-specified password.

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Boot process: Initial software ?
 BIOS (Basic Input Output System) or first steps of UEFI Unified Extensible Firmware Interface in modern PCs) is stored in non-volatile memory (ROM – read only memory) on the motherboard.
 It controls the start-up steps, provides initial system configuration (power saving, security, etc.), and initially configures accessible hardware
 The Unified Extensible Firmware Interface (UEFI), like BIOS (Basic Input Output System) is a firmware that runs when the computer is booted. It initializes the hardware and loads the operating system into the memory. However, being the more modern solution and overcoming various limitations of BIOS, UEFI is all
set to replace the BIOS.
https://en.wikipedia.org/wiki/BIOS
https://www.howtogeek.com/56958/htg-explains-how-uefi-will-replace-the-bios/

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But what makes BIOS outdated?
IBM compatible PC’s, BIOS has been around since the late 1970s. Since then, it has incorporated some major improvements such as addition of a user interface, and advanced power management functions, which allow BIOS to easily configure the PCs and create better power management plans. Yet, it hasn’t advanced as much as the computer hardware and software technology since the 70s.
Limitations of BIOS
• BIOS is restricted to 1Mbytes of space, can boot from drives of less than 2.2 TB. 3+ TB drives are now a standard, and a system with a BIOS can’t boot from them.
• BIOS runs in 16-bit processor mode, and has only 1 MB space to execute.
• It can’t initialize multiple hardware devices at once, thus leading to slow booting process.
Booting Process With BIOS : When BIOS begins it’s execution, it first goes for the Power-On Self Test (POST), which ensures that the hardware devices are functioning correctly. After that, it checks for the Master Boot Record in the first sector of the selected boot device. From the MBR, the location of the Boot-Loader is retrieved, which, after being loaded by BIOS into the computer’s RAM, loads the O.S into the main memory.

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But what makes BIOS outdated & UEFI the future?
• Booting Process With UEFI : Unlike BIOS, UEFI doesn’t look for the MBR in the first sector of the Boot Device. It maintains a list of valid boot volumes called Service Partitions. During the POST procedure the UEFI firmware scans all of the bootable storage devices that are connected to the system for a valid GUID Partition Table (GPT).
• GUID Partition Table (GPT) is a standard for the layout of the partition table on a physical storage device used in a desktop or server PC, such as a hard disk drive or solid-state drive, using globally unique identifiers (GUID), which is an improvement over MBR.
• Unlike the MBR, GPT doesn’t contain a Boot-Loader. The firmware itself scans the GPT to find an EFI Service Partition to boot from, and directly loads the OS from the right partition.
Advantages of UEFI over BIOS
• Breaking Out Of Size Limitations : The UEFI firmware can boot from drives of 2.2 TB or larger with the theoretical
upper limit being 9.4 Zettabytes ( 1 Zettabyte is about a billion Terabyte)
• Speed and performance : UEFI can run in 32-bit or 64-bit mode, which means your boot process is faster. Provides access to all hardware and faster hardware initialization.
• More User-Friendly Interface : Since UEFI can run in 32-bit and 64-bit mode, it provides better UI configuration that has better graphics and also supports mouse cursor.
• Security: UEFI also provides the feature of Secure Boot. It allows only authentic drivers and services to load at boot time. It also requires drivers and the Kernel to have digital signature. Authentication feature before O.S starts.
• Network: Network access before the O.S has started

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UEFI Criticism
● Boot restrictions (i.e. secure boot) can prevent users from installing the Operating System of their choice.
● Additional complexity provides additional possibilities for errors and new attack vectors.
● Some more on secure boot in security part of the unit.
● Most new generation of PCs now are using UEFI.
● Replace: Intel plans to completely replace BIOS with UEFI, for all it’s chipsets, by 2020.
https://medium.com/@matrosov/uefi-vulnerabilities-classification-4897596e60af

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A little bit on values/sizes/measurements
● What is all this tera, kilo, nano, pico, ….?
● And sometimes its powers of 10 & sometimes its powers of 2?
In powers of decimal “10” values/sizes/measurements

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A little bit on values/sizes/measurements
● What is all this tera, kilo, nano, pico, ….?
● And sometimes its powers of 10 & sometimes its powers of 2?
For Bytes(bits) in powers of “2” values/sizes/measurements

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Exam info:

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Assignment-1

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Assignment-1

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Assignment-1

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Assignment-1

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Assignment-1
Unicode or ASCII table = https://naveenr.net/unicode-character-set-and-utf-8-utf-16-utf-32-encoding/

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Assignment-1
Unicode or ASCII table = https://naveenr.net/unicode-character-set-and-utf-8-utf-16-utf-32-encoding/

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Assignment-1
Unicode or ASCII table = https://naveenr.net/unicode-character-set-and-utf-8-utf-16-utf-32-encoding/

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