CS计算机代考程序代写 plp.metafile

plp.metafile

main.asm

sseg_display.asm

plp.simconfig

plp.hex

plp.image

PLP-5.0
DIRTY=1
ARCH=0

main.asm
sseg_display.asm

.org 0x10000000

li $sp, 0x10fffffc # Stack pointer initialization
li $s0, sseg_lut # Lookup table address used by sseg_display
lui $s1, 0xf070 # Interrupt controller register
lui $s2, 0xf0a0 # Seven segment display

# ****************************
# TODO: enable interrupts below
# ****************************

# NOTE: Do not add or modify any code within this main loop
main:
jal sseg_display
nop
addiu $a0, $a0, 1
j main
nop

# ****************************************
# TODO: add interrupt service routine below
# ****************************************
sseg_display.asm:

asm_file_trap:
# If your program ends up in this loop then your ISR is not being exited correctly
lui $s0, 0xf0a0
li $t0, 0x86afafff # “Err” on seven segment
sw $t0, 0($s0)
j asm_file_trap
nop

sseg_display:

move $t1, $a0
move $t3, $0

# Position 0
andi $t2, $t1, 0xf
sll $t2, $t2, 2
addu $t2, $t2, $s0 # Calculate LUT address
lw $t2, 0($t2)
or $t3, $t3, $t2

# Position 1
andi $t2, $t1, 0xf0
srl $t2, $t2, 2
addu $t2, $t2, $s0 # Calculate LUT address
lw $t2, 0($t2)
sll $t2, $t2, 8
or $t3, $t3, $t2

# Position 2
andi $t2, $t1, 0xf00
srl $t2, $t2, 6
addu $t2, $t2, $s0 # Calculate LUT address
lw $t2, 0($t2)
sll $t2, $t2, 16
or $t3, $t3, $t2

# Position 3
andi $t2, $t1, 0xf000
srl $t2, $t2, 10
addu $t2, $t2, $s0 # Calculate LUT address
lw $t2, 0($t2)
sll $t2, $t2, 24
or $t3, $t3, $t2

# Write to seven segment and increment
jr $ra
sw $t3, 0($s2)

# Seven segment display lookup table
sseg_lut:
.word 0xc0 # 0
.word 0xf9 # 1
.word 0xa4 # 2
.word 0xb0 # 3
.word 0x99 # 4
.word 0x92 # 5
.word 0x82 # 6
.word 0xf8 # 7
.word 0x80 # 8
.word 0x90 # 9
.word 0x88 # a
.word 0x83 # b
.word 0xc6 # c
.word 0xa1 # d
.word 0x86 # e
.word 0x8e # f

asm_file_trap:
# If your program ends up in this loop then your ISR is not being exited correctly
lui $s0, 0xf0a0
li $t0, 0x86afafff # “Err” on seven segment
sw $t0, 0($s0)
j asm_file_trap
nop

sseg_display:

move $t1, $a0
move $t3, $0

# Position 0
andi $t2, $t1, 0xf
sll $t2, $t2, 2
addu $t2, $t2, $s0 # Calculate LUT address
lw $t2, 0($t2)
or $t3, $t3, $t2

# Position 1
andi $t2, $t1, 0xf0
srl $t2, $t2, 2
addu $t2, $t2, $s0 # Calculate LUT address
lw $t2, 0($t2)
sll $t2, $t2, 8
or $t3, $t3, $t2

# Position 2
andi $t2, $t1, 0xf00
srl $t2, $t2, 6
addu $t2, $t2, $s0 # Calculate LUT address
lw $t2, 0($t2)
sll $t2, $t2, 16
or $t3, $t3, $t2

# Position 3
andi $t2, $t1, 0xf000
srl $t2, $t2, 10
addu $t2, $t2, $s0 # Calculate LUT address
lw $t2, 0($t2)
sll $t2, $t2, 24
or $t3, $t3, $t2

# Write to seven segment and increment
jr $ra
sw $t3, 0($s2)

# Seven segment display lookup table
sseg_lut:
.word 0xc0 # 0
.word 0xf9 # 1
.word 0xa4 # 2
.word 0xb0 # 3
.word 0x99 # 4
.word 0x92 # 5
.word 0x82 # 6
.word 0xf8 # 7
.word 0x80 # 8
.word 0x90 # 9
.word 0x88 # a
.word 0x83 # b
.word 0xc6 # c
.word 0xa1 # d
.word 0x86 # e
.word 0x8e # f

simRunnerDelay::19
simAllowExecutionOfArbitraryMem::true
simBusReturnsZeroForUninitRegs::true
simDumpTraceOnFailedEvaluation::false
WATCHER
END
MODS
0::RESERVED_FIELD::0::2048::noframe
0::RESERVED_FIELD::268435456::16777216::noframe
1::RESERVED_FIELD::4028628992::1::frame::true::0::0::0::0
2::RESERVED_FIELD::4027580416::1::frame::false::0::0::0::0
4::RESERVED_FIELD::4031774720::2::frame::false::0::0::0::0
7::RESERVED_FIELD::4032823296::1::noframe
9::RESERVED_FIELD::4037017600::1::frame::true::0::0::0::0
8::RESERVED_FIELD::4026531840::4::frame::false::0::0::0::0
6::RESERVED_FIELD::4030726144::2::frame::false::0::0::0::0
12::RESERVED_FIELD::4029677568::3::frame::false::0::0::0::0
END
ISASPECIFIC

END

32’h3c1d10ff
32’h37bdfffc
32’h3c121000
32’h365200b0
32’h3c13f070
32’h3c14f0a0
32’h0c000011
32’h00000000
32’h24840001
32’h08000006
32’h00000000
32’h3c12f0a0
32’h3c0886af
32’h3508afff
32’hae480000
32’h0800000b
32’h00000000
32’h00044825
32’h00005825
32’h312a000f
32’h000a5080
32’h01525021
32’h8d4a0000
32’h016a5825
32’h312a00f0
32’h000a5082
32’h01525021
32’h8d4a0000
32’h000a5200
32’h016a5825
32’h312a0f00
32’h000a5182
32’h01525021
32’h8d4a0000
32’h000a5400
32’h016a5825
32’h312af000
32’h000a5282
32’h01525021
32’h8d4a0000
32’h000a5600
32’h016a5825
32’h03e00008
32’hae8b0000
32’h000000c0
32’h000000f9
32’h000000a4
32’h000000b0
32’h00000099
32’h00000092
32’h00000082
32’h000000f8
32’h00000080
32’h00000090
32’h00000088
32’h00000083
32’h000000c6
32’h000000a1
32’h00000086
32’h0000008e