CS计算机代考程序代写 Java mips assembly Last Name: ________________________________ First Name: ________________________________

Last Name: ________________________________ First Name: ________________________________
CruzID: ________________________________
Final Exam
CMPE 012: Computer Systems and Assembly Language
University of California, Santa Cruz
Fall 2018
DO NOT BEGIN UNTIL YOU ARE TOLD TO DO SO.
This exam is closed book and closed notes. Only 4-function calculators are permitted. Answers must be marked on the Scantron form to be graded. All work must be written on the exam.
Write your first name, last name, and CruzID on this page. Write your CruzID on all subsequent pages of the exam. On the Scantron form, bubble in your name, student ID number, and test form. The test form can be found in the footer of all subsequent pages of the exam.
You must sit in your assigned seat. Keep your student or government issued ID on your desk. Brimmed hats must be removed or turned around backwards. Only unmarked water bottles are permitted. Backpacks must be placed at the front of the room. Your cell phone must be on a setting where it will not make noise or vibrate.
All questions are multiple choice. Some questions have more than one correct answer. You must mark all correct answers to receive credit for a question.
You have 120 minutes to complete this exam.

Bits
1. What is the size of a byte? A. 32bits
B. 10bits C. 4bits D. 6bits E. 8bits
2. What is the size of a nybble? A. 2bits
B. 64bits C. 32bits D. 4bits E. 8bits
3. What is the size of a word in MIPS? A. 8bits
B. 4bits C. 32bits D. 16bits E. 64bits
Binary Addition
CruzID: @ucsc.edu CMPE 12 Final Exam Version A
Fall 2018
4. Which computations have overflow? Assume numbers are 16-bit two’s complement. Select all that apply.
A. 0x76F9 + 0x801A = 0xF713
B. 0xD02A + 0x57D9 = 0x2803
C. 0xF02B + 0x57D9 = 0x5864
D. 0x0308 + 0x1198 = 0x14A0
E. 0x0308 + 0x1198 = 0x14A0
5. Which computations have carry out but no overflow? Assume numbers are 8-bit two’s complement. Select all that apply.
A. 0x2C + 0x2D
B. 0xED + 0x09
C. 0x0A + 0xFD
D. 0xD9 + 0x5C
E. 0x7F + 0x01
CMPE 12 Final Exam Version A
Page 1 of 11
Fall 2018

A.
B.
C.
D.
E.
Lab 4 was easy.
You’re a wizard, Harry. CE12 is love. CE12 is life. CE12 was the best class ever. No, I am your father!
7. Which IEEE 754 Single Precision floating point numbers are additive inverses of each other? (Select two) A. 0x40400000
B. 0xC0400000 C. 0x26500000 D. 0xF4500000 E. 0x354FFFFF
8. Convert this 8-bit 2’s complement number to decimal: 11010110 A. -44
B. 212 C. -40 D. -42 E. 213
9. Which IEEE 754 Single Precision floating point number is furthest from zero?
A. 0x42903333
B. 0xC3018000
C. 0xC2366666
D. 0x425A6666
E. 0x4377999A
10. Convertthisbase15numberintobase9:42 A. 62
B. 46 C. 28 D. 68 E. 38
Logic
11. Giventhelogiccircuitbelow,xandyarelogicallyequivalent.
A. False B. True
CruzID:
@ucsc.edu
Data Representation
6. Decode the following ASCII string.
0x43 0x45 0x31 0x32 0x20 0x69 0x73 0x20 0x6c 0x6f 0x76 0x65
0x2e 0x20 0x43 0x45 0x31 0x32 0x20 0x69 0x73 0x20 0x6c 0x69
0x66 0x65 0x2e
CMPE 12 Final Exam Version A Page 2 of 11 Fall 2018

12. Whatdevicedoesthistimingdiagramrepresent:
A.
B.
C.
D.
E.
S-R latch, active high S-R latch, active low Dlatch
D-Rlatch
D flip flop, edge triggered
13. SelectallexpressionsequivalenttoA ̄·B+A·B A. A
B. B
C. AB
D. AB
E. (A ̄+B)·(A+B)
Addressability
Assume a 4MB memory space with 4096 memory locations i.e. addresses.
14. What is the addressability of this memory space? i.e. How many bytes are stored at each memory loca- tion?
A. 1024 B. 9
C. 512 D. 4096 E. 10
15. Howmanybitsareneededtorepresenttheaddress? A. 12
B. 9 C. 34 D. 36 E. 22
CruzID: @ucsc.edu
CMPE 12 Final Exam Version A
Page 3 of 11
Fall 2018

MIPS
16. TranslatethefollowingJavastatementintoMIPSassemblycode.Assumethatx,y,z,qarestoredinregisters $s1, $s2, $s3, and $s4 respectively.
A. B. C. D. E.
add $t0 $s1 $s2
sub $t0 $s2 $s3
add $s1 $t0 $s4
add $s1 $s1 $s3
sub $s1 $s1 $s2
add $s1 $s1 $s4
add $s3 $s3 $s4
add $s2 $s2 $s3
sub $s1 $s1 $s2
sub $t0 $s1 $s2
add $t0 $t0 $s3
add $s1 $t0 $s4
sub $s1 $s1 $s2
add $s1 $s1 $s4
add $s1 $s1 $s3
17. Howcanweisolatebits20:14of$t0?
A. B. C. D. E.
ANDI $t0 $t0 0x1FC000
ORI $t0 $t0 0x0001FC
XORI $t0 $t0 0x11FFC
AND $t0 $t0<<2 AND $t0 $t0 0x1FC000 CMPE 12 Final Exam Version A Page 4 of 11 Fall 2018 x=xy+z+q CruzID: @ucsc.edu The next four questions refer to this code. .data first_word: .asciiz "flux" second_word: .asciiz "bunny" .text main: la $a0, first_word jal PUSH_STRING #push "bunny" la $a0, second_word jal PUSH_STRING #pop and print ten characters li $a1, 8 jal POP_AND_PRINT #exit program: li $v0, 10 syscall #Pushes a string onto the stack, followed by the length of the string #input: $a0 = address of string to push PUSH_STRING: lb $t1, ($a0) beqz $t1, EXIT_PUSH_STRING subi $sp, $sp, 4 sw $t1, ($sp) addi $a0, $a0, 1 b PUSH_STRING EXIT_PUSH_STRING: jr $ra #Pops a number of characters off the stack, and printing each one #a1 = number of characters to pop and print POP_AND_PRINT: lb $a0, ($sp) addi $sp, $sp, 4 li $v0, 11 #print character syscall subi $a1, $a1, 1 bnez $a1, POP_AND_PRINT jr $ra CMPE 12 Final Exam Version A Page 5 of 11 Fall 2018 CruzID: @ucsc.edu 18. Whatisthevalueofthestackpointerafterthiscodeexits? A. 0x2fdc B. 0x2ffc C. 0x2fd8 D. 0x3000 E. 0x2ff8 19. Whichinstructionsarethe”pop”operation? A. subi $sp, $sp, 4 / sw $t1, ($sp) B. li $a1, 8 / jal POPANDPRINT C. lb $a0, ($sp) / addi $sp, $sp, 4 D. subi $sp, $sp, 4 / addi $a0, $a0, 1 E. bnez $a1, POP AND PRINT / jr $ra 20. Whatdoesthiscodeprint? A. nnubxulf B. xulfnnub C. fluxbunn D. ynnubxul E. bunnyflu 21. Whatistheminimumvalueof$spduringexecutionofthiscode? A. 0x2FF7 B. 0x2FDC C. 0x2FF0 D. 0x3000 E. 0x2FD8 The following three questions refer to this code. li $t0, 1 li $t1, 1 sll $t0, $t0, 2 mul $t1, $t1, 4 div $t1, $t0 mfhi $t2 add $t0, $t0, 3 div $t0, $t1 mfhi $t3 mflo $t4 22. Whatisthevalueof$t2afterthiscodeisexecuted? A. 1 B. 0 C. 3 D. 4 E. 2 CruzID: @ucsc.edu CMPE 12 Final Exam Version A Page 6 of 11 Fall 2018 addiu $t0 sw $t0 ($t1) lb $t0 4($t1) add $t1, $t1, 2 lh $t3 0($t1) 25. Whatisthevalueofregister$t1? A. 0x00001004 B. 0xFFFF1000 C. 0x00001002 D. 0x00001000 26. Whatisthevalueofregister$t3? A. 0x0000DAAB B. 0xFFFFBAAD C. 0xFFFFADBA D. 0x0000BAAD E. 0x0000ADBA CMPE 12 Final Exam Version A Page 7 of 11 Fall 2018 $zero 0xCAFE CruzID: @ucsc.edu 23. Whatisthevalueof$t4afterthiscodeisexecuted? A. 4 B. 2 C. 16 D. 0 E. 1 24. Whatisthevalueof$t3afterthiscodeisexecuted? A. 4 B. 0 C. 2 D. 3 E. 1 Data Movement Consider a byte-addressable memory space with little endian memory storage. Assume $t1 contains the value 0x1000 and the initial memory state is as follows: Address Data 0x1005 0xFE 0x1004 0xCA 0x1003 0xAD 0x1002 0xBA 0x1001 0x00 0x1000 0x00 The following MIPS instructions are executed: 27. Whatisthevalueofregister$t0? A. 0xCAFFFFFF B. 0xCA000000 C. 0x000000CA D. 0xFFFFFFCA E. 0x000000AD Arrays The next three questions refer to the following code: 1 .data 2 space: .asciiz " " 3 array: .space 32 4 5 6 7 8 9 10 11 loop: 12 bgt $t2, 75, printArray 13 add $t3, $s0, $t0 14 15 sb $t2, 0($t3) 16 add $t0, $t0, 1 17 add $t2, $t2, 2 18 j loop 19 20 printArray: 21 la $a0, array 22 li $v0, 4 23 syscall 24 25 nop 26 li $v0, 10 27 syscall 28. Whatwillbeprintedtothescreenaftertheprogramcompletesexecution? .text main: A. B. C. D. E. ABCDEFGHIJKL 65666768697071727374 ACEGIK ABCDEFGHIJK nothing will be printed la $s0, array li $t0, 0 li $t2, 65 CMPE 12 Final Exam Version A Page 8 of 11 Fall 2018 CruzID: @ucsc.edu 29. Assumeyouchangedline16from add $t0, $t0, 1 to add $t0, $t0, 2 What would be printed to the screen after the program completes execution? none of the other answers ABCDEFGHIJK ACEGIK 6567697173 A 30. Whatwillbestoredinregister$s0rightafterexecutionofline7? A. B. C. D. E. A. B. C. D. none of the other answers register $s0 will contain the value of 32 register $s0 will be set to zero register $s0 will contain the address of ’array’ Decoding Instructions 31. Themachinecode0x8D6E0101representswhichinstruction? A. LW B. SUBU C. SUBU D. LW E. ANDI $t3 0x0101($t6) $zero $t3 $t6 $t3 $t6 $zero $t6 0x0101($t3) $t2 $t3 0x1010 32. WhichMIPS32assemblylanguageinstructionassemblesintothemachinecode0x2A690003? A. addi $t1, $s3, 3 B. sw $t1, 3($t2) C. slti $t1, $s3, 3 D. xor $t1, $v1, $s3 33. Encodethefollowinginstruction: BNE $t1 $t0 0x10 A. 0x21090010 B. 0x15280010 C. 0x35090010 D. 0x15280100 E. 0x21090010 CMPE 12 Final Exam Version A Page 9 of 11 Fall 2018 CruzID: @ucsc.edu Data Path Refer to this data path diagram for the next five questions. The next two questions refer to the following MIPS32 instruction: bne $t1, $t3, init count loop This instruction is stored at memory address 0x3008. The label ”init count loop” refers to an instruction stored at memory address 0x308C. Prior to executing this instruction, $t1 and $t3 contain 0x0E66 and 0xBABE, respectively. Note: A branch instruction uses the format bne rs rt label CruzID: @ucsc.edu CMPE 12 Final Exam Version A Page 10 of 11 Fall 2018 A. B. C. D. E. 0x0E64 0xBABC 0x0E66 0xBABE This line is not used in this instruction 37. AssumetheaddressrangeofthedatamemoryinthisMIPSprocessoris0x00000000-0x00001000.Doesthis instruction execute without error? A. yes B. no 38. Whatisthesignalonline10? A. B. C. D. E. 0x0E64 0xBABC 0x0E66 0xBABE This line is not used in this instruction CMPE 12 Final Exam Version A Page 11 of 11 Fall 2018 CruzID: @ucsc.edu 34. Duringexecution,whatsignalisonline4? A. 0x3008 B. 0x0020 C. 0x0080 D. 0x000B E. 0x305C 35. Duringexecution,whatsignalisonline9? A. 0x305C B. 0x0020 C. 0xBABE D. 0x0E66 E. 0x000B The next three problems refer to the following MIPS32 instruction: sw $t3, -2($t1) Again, $t1 and $t3 contain 0x0E66 and 0xBABE, respectively. 36. Whatisthesignalonline12? REG NAME REG # MNEMONIC MEANING TYPE OPCODE FUNCT MNEMONIC MEANING TYPE OPCODE FUNCT $zero 0 sll $at 1 srl $v0 2 sra $v1 3 jr $a0 4 mfhi $a1 5 mflo $a2 6 mult $a3 7 multu $t0 8 div $t1 9 divu $t2 10 add $t3 11 addu $t4 12 sub $t5 13 subu $t6 14 and $t7 15 or $s0 16 xor $s1 17 nor $s2 18 slt $s3 19 sltu $s4 20 j $s5 21 jal $s6 22 beq $s7 23 bne $t8 24 blez $t9 25 addi $k0 26 addiu $k1 27 slti $gp 28 sltiu $sp 29 andi xori Bitwise XOR (Exclusive-OR) Immediate lui Load Upper Immediate mfc0 Move from Coprocessor 0 lb Load Byte lh Load Halfword lw Load Word lbu Load Byte Unsigned lhu Load Halfword Unsigned sb Store Byte sh Store Halfword sw Store Word Logical Shift Left Logical Shift Right (0-extended) Arithmetic Shift Right (sign-extended) Jump to Address in Register Move from HI Register Move from LO Register Multiply Unsigned Divide Unsigned Add Add Unsigned Subtract Unsigned Subtract Bitwise AND Bitwise OR Bitwise XOR Bitwise NOR Setto1if Setto1if Jump to Address Jump and Link Branch if Equal Branch if Not Equal Branch if Less Than or Equal to Zero Add Immediate Add Unsigned Immediate Set to 1 if Less Than Immediate Set to 1 if Less Than Unsigned ImmediateI 0x00 0x00 add 0x00 0x02 addi 0x00 0x03 addiu 0x00 0x08 addu 0x00 0x10 and 0x00 0x12 andi 0x00 0x18 beq 0x00 0x19 blez 0x00 0x1A bne 0x00 0x1B div 0x00 0x20 divu 0x00 0x21 j 0x00 0x22 jal 0x00 0x23 jr 0x00 0x24 lb 0x00 0x25 lbu 0x00 0x26 lh 0x00 0x27 lhu 0x00 0x2A lui 0x00 0x2B lw 0x02 NA mfc0 0x03 NA mfhi 0x04 NA mflo 0x05 NA mult 0x06 NA multu 0x08 NA nor 0x09 NA or 0x0A NA ori 0x0B NA sb 0x0C NA sh 0x0D NA sll 0x0E NA slt 0x0F NA slti 0x10 NA sltiu 0x20 NA sltu 0x21 NA sra 0x23 NA srl 0x24 NA sub 0x25 NA subu 0x28 NA sw 0x29 NA xor 0x2B NA xori Add Add Immediate Add Unsigned Immediate Add Unsigned Bitwise AND Bitwise AND Immediate R I I R R I I I I R R J J R I I I I I I R R R R R R R I I I R R I 0x00 0x20 0x08 NA 0x09 NA 0x00 0x21 0x00 0x24 0x0C NA 0x04 NA 0x06 NA 0x05 NA 0x00 0x1A 0x00 0x1B 0x02 NA 0x03 NA 0x00 0x08 0x20 NA 0x24 NA 0x21 NA 0x25 NA 0x0F NA 0x23 NA 0x10 NA 0x00 0x10 0x00 0x12 0x00 0x18 0x00 0x19 0x00 0x27 0x00 0x25 0x0D NA 0x28 NA 0x29 NA 0x00 0x00 0x00 0x2A 0x0A NA 0x0B NA 0x00 0x2B 0x00 0x03 0x00 0x02 0x00 0x22 0x00 0x23 0x2B NA 0x00 0x26 0x0E NA R R R R R R R R R R R R R R R R R R R R J J I I I I I I Branch Branch Branch Divide Unsigned Divide Jump to Address Jump and Link Jump to Address in Register Load Byte Multiply Divide if Equal if Less Than or Equal to Zero if Not Equal (Exclusive-OR) (NOT-OR) Less Than Less Than Unsigned Load Byte Unsigned Load Halfword Load Halfword Unsigned Load Upper Immediate Load Word Move from Move from Move from Multiply Unsigned Multiply Bitwise NOR (NOT-OR) Bitwise OR Bitwise OR Immediate 0 Coprocessor HI Register LO Register Bitwise AND Immediate ori Bitwise OR Immediate I I I I R I I I I I I I I Store Byte Store Halfword Logical Shift Left Set to 1 if Less Than Set to 1 if Less Than Set to 1 if Less Than Set to 1 if Less Than Arithmetic Shift Right (sign-extended) Logical Shift Right (0-extended) Subtract Unsigned Subtract Store Word Bitwise XOR (Exclusive-OR) Bitwise XOR (Exclusive-OR) Immediate Immediate Unsigned Immediate I Unsigned R R R R R I R I R Type: instr rd rs rt (arithmetic, logical) instr rd rt shamt (shifts) 31 26 25 21 20 16 15 11 10 6 5 0 opcode rs rt rd shamt funct I Type: instr rt rs immediate branch rs rt immediate instr rt immediate(rs) (arithmetic, logical) (branches) (loads, stores) 31 26 25 21 20 16 15 0 opcode rs rt immediate J Type: j immediate (jumps) 31 26 25 0 opcode immediate BIN 010 0000 010 0001 010 0010 010 0011 010 0100 010 0101 010 0110 010 0111 010 1000 010 1001 010 1010 010 1011 010 1100 010 1101 010 1110 010 1111 011 0000 011 0001 011 0010 011 0011 011 0100 011 0101 011 0110 011 0111 011 1000 011 1001 011 1010 011 1011 011 1100 011 1101 011 1110 011 1111 100 0000 100 0001 100 0010 100 0011 100 0100 100 0101 100 0110 100 0111 100 1000 100 1001 100 1010 100 1011 100 1100 100 1101 100 1110 100 1111 40 32 20 space 413321 ! 423422 " 433523 # 443624 $ 453725 % 463826 & 473927 ' 504028 ( 514129 ) 52422A * 53432B + 54442C , 55452D - 56462E . 57472F / 604830 0 614931 1 625032 2 635133 3 645234 4 655335 5 665436 6 675537 7 705638 8 715739 9 72583A : 73593B ; 74603C < 75613D = 76623E > 77633F ?
100 64 40 @ 101 65 41 A 102 66 42 B 103 67 43 C 104 68 44 D 105 69 45 E 106 70 46 F 107 71 47 G 110 72 48 H 111 73 49 I 112 74 4A J 113 75 4B K 114 76 4C L 115 77 4D M 116 78 4E N 117 79 4F O
101 0000 120 80 50 P 101 0001 121 81 51 Q 101 0010 122 82 52 R 101 0011 123 83 53 S 101 0100 124 84 54 T 101 0101 125 85 55 U 101 0110 126 86 56 V 101 0111 127 87 57 W 101 1000 130 88 58 X 101 1001 131 89 59 Y 101 1010 132 90 5A Z 101 1011 133 91 5B [ 101 1100 134 92 5C \ 101 1101 135 93 5D ] 101 1110 136 94 5E ^ 101 1111 137 95 5F _ 110 0000 140 96 60 ` 110 0001 141 97 61 a 110 0010 142 98 62 b 110 0011 143 99 63 c 110 0100 144 100 64 d 110 0101 145 101 65 e 110 0110 146 102 66 f 110 0111 147 103 67 g 110 1000 150 104 68 h 110 1001 151 105 69 i 110 1010 152 106 6A j 110 1011 153 107 6B k 110 1100 154 108 6C l 110 1101 155 109 6D m 110 1110 156 110 6E n 110 1111 157 111 6F o 111 0000 160 112 70 p 111 0001 161 113 71 q 111 0010 162 114 72 r 111 0011 163 115 73 s 111 0100 164 116 74 t 111 0101 165 117 75 u 111 0110 166 118 76 v 111 0111 167 119 77 w 111 1000 170 120 78 x 111 1001 171 121 79 y 111 1010 172 122 7A z 111 1011 173 123 7B { 111 1100 174 124 7C | 111 1101 175 125 7D } 111 1110 178 126 7E ~ 111 1111 177 127 7F DEL
ASCII CODE ASCII CODE
OCT DEC HEX CHARACTER BIN OCT DEC HEX CHARACTER