CS计算机代考程序代写 python mips assembly Von Neumann and MIPS

Von Neumann and MIPS
References:
1) MIPS_Vol2.pdf
2) Intro to MIPS Assembly Language Programming

Reminder

Any lab grading questions must be sent only to TA Kevin. You can CC me in the email
CSE 12 Fall 2020
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A Simple Program(Python) – Not Divisible by 4
Determines if a number is not divisible by 4
■ Finds remainder of number divided by 4
■ If remainder exists then number is not
divisible by 4
CSE 12 Fall 2020
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A Simple Program(Python) – Not Divisible by 4
Determines if a number is not divisible by 4 ■ Converts number to binary
■ Checkstoseeifbit0orbit1is1
Decimal
1
2
3
4
5
Binary
0001
0010
0011
01
00
6
7
8
0101
0110
0111
10
00
9
10
11
12
1001
1010
1011
11
00
13
14
15
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1101
1110
1111

A Simple Program (Assembly) – Not Divisible by 4
Determines if a number is not divisible by 4 ■ Checkstoseeifbit0orbit1is1
CSE 12 Fall 2020
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The von Neumann Model
■ Memory: holds both data and instructions
■ Processing Unit: carries out the instructions
■ Control Unit: sequences and interprets instructions
■ Input: external information into the memory
■ Output: produces results for the user
CSE 12 Fall 2020
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von Neumann Model – Memory
■ Each location has an address and contents
◆ Address: bit pattern that uniquely identifies a memory
location
◆ Contents: bit pattern stored at a given address.
◆ Analogy: P.O. boxes have fixed numbers, but changing contents.
■ Address Space:
◆ The total number of memory locations (“boxes”)
available.
◆ E.g., a 28-bit address provides an address space of 2^28 locations.
◆ MIPS has an address space of 2^32 locations – i.e. it uses a 32-bit address.
CSE 12 Fall 2020
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von Neumann Model – Memory (2)
■ Addressability (Byte vs. Word):
◆ a word is the basic unit of data used by the
processing unit, often multiple bytes;
◆ frequently, an instruction must store or retrieve an entire word with a single memory access.
◆ Addressability refers to the number of bytes of memory referenced by a given address.
◆ Byte Adressable CSE 12 Fall 2020
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von Neumann Model – Processing Unit
4-9
■ Does the actual work!
◆ Can consist of many sub-units, each specializing
in one complex function.
◆ At a minimum, has Arithmetic & Logic Unit (ALU) and General Purpose Registers (GPRs)
CSE 12 Fall 2020
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von Neumann Model – Processing Unit (2)
4 – 10
◆ Close to the ALU (much faster access than RAM). CSE 12 Fall 2020
■ ALU
◆ Performs basic operations: add, subtract, and, not,
etc.
◆ Generally operates on whole words of data. ◆ Some can also operate on subsets of words
■ Registers
◆ Fast “on-board” memory for a small number of words.
◆ Invaluable for intermediate data storage while processing
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von Neumann Model – Control Unit
■ The control unit coordinates all actions needed to execute the instruction ◆ It fetches & decodes each instruction, and sets up the appropriate
◆ It communicates with memory via the Program Counter (PC) and Instruction Register (IR)
inputs for the Memory, Processing, and I/O units as required.
■ PC (aka Instruction Pointer)
◆ Holds the address of the next instruction to be fetched.
■ IR (Instruction Register)
◆ Holds the instruction currently being executed. ◆ This can be a single word, or multiple words.
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von Neumann Model – Input/Output
4 – 12
■ Generically known as peripherals – not in the sense that they matter less, but because they are external to the CPU.
■ This means we will have to develop mechanisms for autonomous devices to communicate with each other – more on this later.
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