CS计算机代考程序代写 x86 chain data structure assembly Lecture Topics

Lecture Topics
• Programmable interrupt controller (PIC) – Linux 8259A Initialization
• Linux abstraction of PIC
• General interrupt abstractions – Interrupt Chaining
– Soft Interrupts

ECE391 EXAM 1
• EXAM 1 – March 2 (Tuesday);
– UIUC students: 6:00pm to 8:00pm; Illinois time (or CST)
– ZJUI students: 8:00pm to 10:00pm; China time (which is 6:00am to 8:00am Illinois time)
– Detailed instructions will be provided soon • Conflict Exam
– Deadline to request conflict exam: Friday, February 26, 5:00pm (by email to: kalbarcz@Illinois.edu)
• Exam 1 Synchronous Review Session in collaboration with HKN
– Saturday February 27; 8:00pm; (Illinois time) – Zoom link will be provided later this week

ECE391 EXAM 1
• Topics covered by EXAM 1
– Materia covered in lectures (Lecture1 – Lecture10) • x86 Assembly
• C-CallingConvention
• Synchronization
• Interrupt control (using PIC)
– Material covered in discussions – MP1
• NO Lecture on Tuesday, March 2

Cascade Configuration of PICs

PIC (cont.)
• In Linux (initialization code to be seen shortly) – master IR’s mapped to vector #’s 0x20 – 0x27
– slave IR’s mapped to vector #’s 0x28 – 0x2F – remember the IDT?

Interrupt Descriptor Table

Linux 8259A Initialization

Comments on Linux’ 8259A Initialization Code
1. What is the auto_eoi parameter? always = 0
2. Four initialization control words to set up the master 8259A 3. Four initialization control words to set up the slave 8259A
port(A=?) info contained in Initialization Control Word
ICW1 0 ICW2 1 ICW3 1 ICW4 1
start init, edge-triggered inputs, cascade mode, 4 ICWs high bits of vector #
master: bit vector of slaves; slave: input pin on master ISA=x86, normal/auto EOI

Comments on Linux’ 8259A Initialization Code (cont.)
5. What does the “_p” mean on the “outb” macros?
– add PAUSE instruction after OUTB; “REP NOP” prior to P4
– delay needed for old devices that cannot handle processor’s output rate
6. Critical section spans the whole function; why?
– avoid other 8259A interactions during initialization sequence – (device protocol requires that four words be sent in order)
7. Why use _irqsave for critical section?
– this code called from other interrupt initialization routines – which may or may not have cleared IF on processor

Linux Abstraction of PICs
• Uses a jump table
– same as vector table (array of function pointers)
• Table is hw_irq_controller structure (or struct irq_chip)
– each vector # associated with a table
– table used to interact with appropriate PIC (e.g., 8259A, or Advanced PIC)
human-readable name
startup function
shutdown function
enable function
disable function
mask function
mask_ack function
unmask function
(+ several others…)
© Steven Lumetta, Zbigniew Kalbarczyk ECE391

Linux Abstraction of PICs
• hw_irq_controller structure definition
– IRQs are #’d 0-15 (correspond to vector # – 0x20)
const char* name;
unsigned int (*startup)(unsigned int irq);
void (*shutdown)(unsigned int irq);
void (*enable)…
void (*disable)…
void (*ack)…
void (*end)…
/* we’ll ignore the others… */
8259A’s human- readable name is “XT-PIC”; see /proc/interrupts
© Steven Lumetta, Zbigniew Kalbarczyk ECE391

PIC Functions in Jump Table: Explanation
• Initially, all 8259A interrupts are masked out using mask on 8259A
• startup and shutdown functions
– startup is called when first handler is installed for an interrupt
– shutdown is called after last handler is removed for an interrupt
– both functions change the corresponding mask bit in 8259A implementaion
© Steven Lumetta, Zbigniew Kalbarczyk ECE391

PIC Functions in Jump Table: Explanation (cont.)
• Example
no 8259 interrupts
startup IRQ0 (add a handler)
shutdown IRQ0 (remove last handler) IR0 on master
IR0 on master allowed to generate interrupts
prevented from generating interrupts
© Steven Lumetta, Zbigniew Kalbarczyk ECE391


PIC Functions in Jump Table (cont.)
disable/enable functions
– used to support nestable interrupt masking (disable_irq, enable_irq)
disable_irq disable_irq
enable_irq
disable/enable pairs must match!
some function
another function
enable_irq
– on 8259
• first disable_irq calls jump table disable, which masks interrupt on PIC
• last enable_irq calls jump table enable, which unmasks interrupt on PIC
© Steven Lumetta, Zbigniew Kalbarczyk ECE391

PIC Functions in Jump Table (cont.)
• ack function
– called at start of interrupt handling to ack receipt of the
interrupt
– on 8259 (mask and ack) , masks interrupt on PIC, then sends EOI to PIC
• end function
– called at end of interrupt handling
– on 8259, enables interrupt (unmasks it) on PIC
© Steven Lumetta, Zbigniew Kalbarczyk ECE391

General Interrupt Abstractions: Interrupt Chaining
• Hardware view: 1 interrupt → 1 handler
• Problems
– may have > 15 devices
– > 1 software routines may want to act in response to device
– examples:
• hotkeys for various functions
• move mouse to lower-right corner to start screen-saver
© Steven Lumetta, Zbigniew Kalbarczyk ECE391


General Interrupt Abstractions: Interrupt Chaining (cont.)
One approach
– used by terminate and stay resident (TSR) programs in DOS – form linked list (chain) of handlers using JMP instructions
– not very clean
• no way to remove self
• unless you’re first in list
– to be fair
• TSR program not designed for removal
IRQ4 vector
© Steven Lumetta, Zbigniew Kalbarczyk ECE391
IRET
JMP

General Interrupt Abstractions Interrupt Chaining (cont.)
• Solution
– interrupt chaining with linked list data structure – (not list embedded into code!)
IRQ4 vector
© Steven Lumetta, Zbigniew Kalbarczyk ECE391
execute list #4
list #4
handler 1
handler 2

General Interrupt Abstractions: Interrupt Chaining (cont.)
• Drawbacks of chaining
– for > 1 device
• must query devices to see if they raised interrupt
• not always possible
– for 1 device
• must avoid stealing data/confusing device • example
– by sending two characters to serial port
– in response to interrupt declaring port ready for one char.
© Steven Lumetta, Zbigniew Kalbarczyk ECE391

General Interrupt Abstractions: Soft Interrupts (cont.)
• Recall: why support interrupts?
– slow device gets timely attention from fast processor
– processor gets device responses without repeatedly asking for them
• A useful concept in software
– example: network encryption/decryption
– packet arrives, given to decrypter
– when decrypter (software program) is done
• want to interrupt program
• to transfer data from packet
– but has no access to INTR pin © Steven Lumetta, Zbigniew Kalbarczyk ECE391