initial mem[16] = 2
All registers initial = 0
# 1~6 Basic testcase
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addi x1, x0,50
addi x2, x0, 18
sub x3, x1, x2
add x4, x1, x3
or x5, x1, x4
and x6, x2, x4
x1 = 50; x2 = 18; x3 = 32;
x4 = 82; x5 = 114; x6 = 18;
addi x1, x0, 23
addi x2, x0, 13
addi x3, x0, 16
addi x0,x0,0
addi x0,x0,0
or x4, x2, x3
sub x5, x1, x2
add x6, x1, x5
addi x0,x0,0
or x7, x3, x5
addi x0,x0,0
addi x0,x0,0
and x8, x7, x2
addi x0,x0,0
addi x0,x0,0
xor x9, x6, x8
x1 = 23; x2 = 13; x3 = 16;
x4 = 29; x5 = 10; x6 = 33;
x7 = 26; x8 = 8; x9 = 41;
addi x2,x2,60
addi x0,x0,0
addi x0,x0,0
sw x2,0(x0)
0(mem) = 60, x2 = 60
addi x1,x1,40
addi x2,x2,50
addi x0,x0,0
addi x0,x0,0
slt x3,x1,x2
x1 = 40, x2= 50, x3 =1
addi x3,x1,1
addi x0,x0,0
addi x0,x0,0
lw x1,16(x2)
x1 = 2,x3 = 1
slti x1,x1,40
addi x2,x2,5
x1 = 1,x2=5
# 7 ~ 10 Medium testcase
addi x1, x0, 23
addi x2, x0, 13
addi x3, x0, 16
or x4, x2, x3
sub x5, x1, x2
add x6, x1, x5
or x7, x3, x5
and x8, x7, x2
xor x9, x6, x8
x1 = 23; x2 = 13; x3 = 16;
x4 = 29; x5 = 10; x6 = 33;
x7 = 26; x8 = 8; x9 = 41;
addi x2,x2,6
addi x0,x0,0
slli x2,x2,1
addi x1,x1,40
addi x2,x2,50
slt x3,x1,x2
x1 = 40, x2= 50, x3 =1
addi x1,x0,5
addi x1,x0,6
addi x2,x1,4
x1 = 6,x2 = 10
# 11 ~ 13 Advanced testcase
lw x1,16(x2)
add x3,x2,x1
x1 = 2,x3 = 2
beq x1,x1,b_label
addi x4,x4,5
b_label: addi x3,x3,5
jal x1,j_label
addi x4 , x4,5
j_label:addi x3,x3,5
x1 = 4,x3=5
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