sch2hdl -sympath /home/mike/Documents/SimpleCpuDesign/simple_cpu_v1d_fpga/VHDL/ipcore_dir -intstyle ise -family zynq -flat -suppress -vhdl computer_drc.vhf -w /home/mike/Documents/SimpleCpuDesign/simple_cpu_v1d_fpga/VHDL/Src/computer.sch
sch2hdl -sympath /home/mike/Documents/SimpleCpuDesign/simple_cpu_v1d1_fpga/VHDL/ipcore_dir -intstyle ise -family zynq -flat -suppress -vhdl computer_drc.vhf -w /home/mike/Documents/SimpleCpuDesign/simple_cpu_v1d1_fpga/VHDL/Src/computer.sch
sch2sym -intstyle ise -family zynq -w -refsym computer /home/mike/Documents/SYS1/Exam/VHDL/Src/computer.sch /home/mike/Documents/SYS1/Exam/VHDL/computer.sym