vhdtdtfi -lib work ram_4Kx16_sim_v1a.vhd -prj simple_cpu_v1d -o ram_4Kx16_sim.spl -module ram_4Kx16_sim -template /opt/Xilinx/14.7/ISE_DS/ISE//data/splfile.tft -deleteonerror
spl2sym -intstyle ise -family zynq -w ram_4Kx16_sim.spl /home/mike/Documents/SYS1/Exam/VHDL/ram_4Kx16_sim.sym