sch2sym -intstyle ise -family zynq -w -refsym buf16 /home/mike/Documents/SimpleCpuDesign/simple_cpu_v1d_fpga/VHDL/buf16.sch /home/mike/Documents/SimpleCpuDesign/simple_cpu_v1d_fpga/VHDL/buf16.sym
sch2sym -intstyle ise -family zynq -w -refsym buf16 /home/mike/Documents/SimpleCpuDesign/simple_cpu_v1d_fpga/VHDL/buf16.sch /home/mike/Documents/SimpleCpuDesign/simple_cpu_v1d_fpga/VHDL/buf16.sym