sch2sym -intstyle ise -family zynq -w -refsym subtractor /mnt/hdd/Documents/Web/SimpleCpuDesign/simple_cpu_v1a_fpga/VHDL/simple_cpu_v1d_gpo/subtractor.sch /mnt/hdd/Documents/Web/SimpleCpuDesign/simple_cpu_v1a_fpga/VHDL/simple_cpu_v1d_gpo/subtractor.sym
sch2hdl -sympath /mnt/hdd/Documents/Web/SimpleCpuDesign/simple_cpu_v1a_fpga/VHDL/simple_cpu_v1d_gpo/ipcore_dir -intstyle ise -family zynq -flat -suppress -vhdl subtractor_drc.vhf -w /mnt/hdd/Documents/Web/SimpleCpuDesign/simple_cpu_v1a_fpga/VHDL/simple_cpu_v1d_gpo/subtractor.sch