— =============================================================================================================
— *
— * Copyright (c) University of York
— *
— * File Name: blockram_4Kx4.vhd
— *
— * Version: V1.0
— *
— * Release Date:
— *
— * Author(s): M.Freeman
— *
— * Description: Random Access Memory single port module
— *
— * Change History: $Author: $
— * $Date: $
— * $Revision: $
— *
— * Conditions of Use: THIS CODE IS COPYRIGHT AND IS SUPPLIED “AS IS” WITHOUT WARRANTY OF ANY KIND, INCLUDING,
— * BUT NOT LIMITED TO, ANY IMPLIED WARRANTY OF MERCHANTABILITY AND FITNESS FOR A
— * PARTICULAR PURPOSE.
— *
— =============================================================================================================
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
LIBRARY UNISIM;
USE UNISIM.vcomponents.ALL;
ENTITY blockram_4Kx4 IS
GENERIC (
INIT_00 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_01 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_02 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_03 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_04 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_05 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_06 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_07 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_08 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_09 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_0A : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_0B : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_0C : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_0D : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_0E : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_0F : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_10 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_11 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_12 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_13 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_14 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_15 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_16 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_17 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_18 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_19 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_1A : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_1B : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_1C : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_1D : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_1E : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_1F : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_20 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_21 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_22 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_23 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_24 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_25 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_26 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_27 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_28 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_29 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_2A : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_2B : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_2C : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_2D : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_2E : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_2F : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_30 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_31 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_32 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_33 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_34 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_35 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_36 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_37 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_38 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_39 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_3A : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_3B : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_3C : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_3D : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_3E : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_3F : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″ );
PORT (
clk : IN STD_LOGIC;
en : IN STD_LOGIC;
we : IN STD_LOGIC;
addr : IN STD_LOGIC_VECTOR(11 DOWNTO 0);
data_in : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
data_out : OUT STD_LOGIC_VECTOR(3 DOWNTO 0) );
END blockram_4Kx4;
ARCHITECTURE blockram_4Kx4_arch OF blockram_4Kx4 IS
component RAMB16_S4
generic (
INIT : bit_vector := X”0″;
INIT_00 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_01 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_02 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_03 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_04 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_05 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_06 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_07 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_08 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_09 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_0A : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_0B : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_0C : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_0D : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_0E : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_0F : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_10 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_11 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_12 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_13 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_14 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_15 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_16 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_17 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_18 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_19 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_1A : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_1B : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_1C : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_1D : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_1E : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_1F : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_20 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_21 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_22 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_23 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_24 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_25 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_26 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_27 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_28 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_29 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_2A : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_2B : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_2C : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_2D : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_2E : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_2F : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_30 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_31 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_32 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_33 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_34 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_35 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_36 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_37 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_38 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_39 : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_3A : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_3B : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_3C : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_3D : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_3E : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
INIT_3F : bit_vector := X”0000000000000000000000000000000000000000000000000000000000000000″;
SRVAL : bit_vector := X”0″;
WRITE_MODE : string := “WRITE_FIRST”
);
port (
DO : out STD_LOGIC_VECTOR (3 downto 0);
ADDR : in STD_LOGIC_VECTOR (11 downto 0);
CLK : in STD_ULOGIC;
DI : in STD_LOGIC_VECTOR (3 downto 0);
EN : in STD_ULOGIC;
SSR : in STD_ULOGIC;
WE : in STD_ULOGIC
);
end component;
attribute BOX_TYPE of
RAMB16_S4 : component is “PRIMITIVE”;
BEGIN
ram_module : RAMB16_S4
GENERIC MAP(
INIT_00 => INIT_00,
INIT_01 => INIT_01,
INIT_02 => INIT_02,
INIT_03 => INIT_03,
INIT_04 => INIT_04,
INIT_05 => INIT_05,
INIT_06 => INIT_06,
INIT_07 => INIT_07,
INIT_08 => INIT_08,
INIT_09 => INIT_09,
INIT_0A => INIT_0A,
INIT_0B => INIT_0B,
INIT_0C => INIT_0C,
INIT_0D => INIT_0D,
INIT_0E => INIT_0E,
INIT_0F => INIT_0F,
INIT_10 => INIT_10,
INIT_11 => INIT_11,
INIT_12 => INIT_12,
INIT_13 => INIT_13,
INIT_14 => INIT_14,
INIT_15 => INIT_15,
INIT_16 => INIT_16,
INIT_17 => INIT_17,
INIT_18 => INIT_18,
INIT_19 => INIT_19,
INIT_1A => INIT_1A,
INIT_1B => INIT_1B,
INIT_1C => INIT_1C,
INIT_1D => INIT_1D,
INIT_1E => INIT_1E,
INIT_1F => INIT_1F,
INIT_20 => INIT_20,
INIT_21 => INIT_21,
INIT_22 => INIT_22,
INIT_23 => INIT_23,
INIT_24 => INIT_24,
INIT_25 => INIT_25,
INIT_26 => INIT_26,
INIT_27 => INIT_27,
INIT_28 => INIT_28,
INIT_29 => INIT_29,
INIT_2A => INIT_2A,
INIT_2B => INIT_2B,
INIT_2C => INIT_2C,
INIT_2D => INIT_2D,
INIT_2E => INIT_2E,
INIT_2F => INIT_2F,
INIT_30 => INIT_30,
INIT_31 => INIT_31,
INIT_32 => INIT_32,
INIT_33 => INIT_33,
INIT_34 => INIT_34,
INIT_35 => INIT_35,
INIT_36 => INIT_36,
INIT_37 => INIT_37,
INIT_38 => INIT_38,
INIT_39 => INIT_39,
INIT_3A => INIT_3A,
INIT_3B => INIT_3B,
INIT_3C => INIT_3C,
INIT_3D => INIT_3D,
INIT_3E => INIT_3E,
INIT_3F => INIT_3F )
PORT MAP(
DO => data_out,
di => data_in,
addr => addr,
clk => clk,
en => en,
ssr => ‘0’,
we => we );
END blockram_4Kx4_arch;