sch2sym -intstyle ise -family zynq -w -refsym onehot_decoder_16 /home/mike/Documents/SimpleCpuDesign/simple_cpu_v1a_fpga/VHDL/simple_cpu_v1a1_gpo/Src/onehot_decoder_16.sch /home/mike/Documents/SimpleCpuDesign/simple_cpu_v1a_fpga/VHDL/simple_cpu_v1a1_gpo/onehot_decoder_16.sym